JTAG and flash

I'm new to learning about jtag and it's capabilities, and my professor
isn't helping me at all.  I understand jtag is mainly used in
processors, but I was reading on Altera's website about a flash chip
(EPM3032A) they use that has jtag support.  What jtag device would I
need to communicate with a flash chip like that?  I understand there
are jtag devices that support many versions of arm, mips, xscale, etc.
but I don't know which would be appropriate for flash memory.  I
appreciate any help.

--Alice

Alice wrote:
> I'm new to learning about jtag and it's capabilities, and my professor
> isn't helping me at all.  I understand jtag is mainly used in
> processors, but I was reading on Altera's website about a flash chip
> (EPM3032A) they use that has jtag support.  What jtag device would I
> need to communicate with a flash chip like that?  I understand there
> are jtag devices that support many versions of arm, mips, xscale, etc.
> but I don't know which would be appropriate for flash memory.  I
> appreciate any help.

JTAG (Joint Test Advisory Group) is a simple serial bit
interface. It specifies a chip-testing access connection
located on an IC between the external pins and the chip
internals.

A JTAG device is just a bit-bang connection with four bits
(TRST, TMS, TCK, TDI) to the device under test and one bit
(TDO) from the device.

The devil lies in the sequencing of the bits,
often wholly handled in software.

The interface is described in the IEEE 1149 standard,
which is sold by IEEE (http://www.ieee.org/) and thus
not available for free in the Net.

The JTAG programming interfaces on programmable chips
are manufacturer and chip-specific. The data source
for these are the data sheets of the chips.

HTH

-- 

Tauno Voipio
tauno voipio (at) iki fi

There are two bits to a JTAG interface.
1) The TDI/TDO chain. You connect all the devices in a loop with TDI
into the first device being driven by your controller
(software/debugger/processor/whatever) and TDO connected to TDI of the
next device. TDO of the last device then connects back to your
controller. Each device has a shift register in it so that the
controller can send out data and knows where in the chain it will end
up.
2) TMS. To tell the devices what they are going to do with the data
that has been shifted into them or what data to shift out of them each
JTAG device has a state machine controlled by TMS.

What the devices do with he data is up to the manufacturer. Most use it
to take control of the IO pins of the device to check the connectivity
of the PCB. Some use it to program FPGAs or CPLDs and some use it for a
debugger.

Colin

"Alice" <ixqnxjpumxklao@mailinator.com> wrote in message 
news:1138256974.949656.307210@o13g2000cwo.googlegroups.com...
> I'm new to learning about jtag and it's capabilities, and my professor
> isn't helping me at all.  I understand jtag is mainly used in
> processors, but I was reading on Altera's website about a flash chip
> (EPM3032A) they use that has jtag support.  What jtag device would I
> need to communicate with a flash chip like that?  I understand there
> are jtag devices that support many versions of arm, mips, xscale, etc.
> but I don't know which would be appropriate for flash memory.  I
> appreciate any help.
>
> --Alice
>
Alice,

This is NOT a flash chip! It is a PLD. BIG difference. You had my hopes up 
for a moment there. JTAG for Flash chips would be a God send for 
production/manufacturing....

JTAG for PLDs/FPGAs is quite commonly interfaced with an adapter you plug 
into your PC USB or serial port. Since JTAG interface is a standard, I would 
think that the only question is which software you need to run for the 
particular manufacturer....

Paul 

"Bo" <bo@cephus.com> wrote in message
news:11e08$43d8e779$18d6ec55$2271@KNOLOGY.NET...
> This is NOT a flash chip! It is a PLD. BIG difference. You had my hopes up
> for a moment there. JTAG for Flash chips would be a God send for
> production/manufacturing....

If you have a flash chip connected to the bus of a processor with JTAG, you
can program the flash.

Meindert

Thanks for the replies, I appologize about the flash error (instead of
PLD).  I have another question.  If I had an ARM chip and an xscale
chip, and I connected TDI/TDO (and the other jtag pins) to the correct
places on the ARM chip, would the same jtag cable/device work on the
xscale chip if they were connected to the proper pins?  I'm confused if
each jtag cable/device is chip specific (is a jtag device used to
communicate with an arm chip is different than one needed to
communicate with an xscale chip?)

Alice wrote:
> Thanks for the replies, I appologize about the flash error (instead of
> PLD).  I have another question.  If I had an ARM chip and an xscale
> chip, and I connected TDI/TDO (and the other jtag pins) to the correct
> places on the ARM chip, would the same jtag cable/device work on the
> xscale chip if they were connected to the proper pins?  I'm confused if
> each jtag cable/device is chip specific (is a jtag device used to
> communicate with an arm chip is different than one needed to
> communicate with an xscale chip?)
> 

TDO will not work correctly. TDO is an output from you Xscale or ARM or 
PLD. TDO must have only one driver.

Please check

for an introduction to JTAG including TAP.
   http://www.amontec.com/pub/amt_ann004.pdf
TCK and TMS are input for all the devices.

TDI is an input for the first device on the JTAG chain. The TDO of the 
first device on the JTAG chain will be an input for the second.

The TDO going to your JTAG Emulator is the TDO of the last device on the 
JTAG chain.

You may see our JTAG Accelerator controller datasheet if you need more 
info on the JTAG interface.
   http://www.amontec.com/pub/amt_ann005.pdf

Best Regards,
Laurent
  www.amontec.com

"Alice" <ixqnxjpumxklao@mailinator.com> wrote in message 
news:1138292638.466785.192420@g47g2000cwa.googlegroups.com...
> Thanks for the replies, I appologize about the flash error (instead of
> PLD).

Alice,

No need to apologize... perhaps my tone came across wrong... I was 
expressing disappointment because a JTAG Flash IC would be really, really, 
really cool.



>I have another question.  If I had an ARM chip and an xscale
> chip, and I connected TDI/TDO (and the other jtag pins) to the correct
> places on the ARM chip, would the same jtag cable/device work on the
> xscale chip if they were connected to the proper pins?  I'm confused if
> each jtag cable/device is chip specific (is a jtag device used to
> communicate with an arm chip is different than one needed to
> communicate with an xscale chip?)

No. You *can* chain all the JTAG devices together by chaining the TDO of 
device #1 to the TDI of device #2, and so forth... BUT a word of caution. I 
have been involved on several board integrations where devices from various 
vendors did not 'play well' with each other. I'd recommend separate chains 
for each mfr--if you have the real-estate/luxury of more connectors and 
their costs.

I also would run separate JTAG chains for any SoC design for the debug/ 
internal microprocessor and the FPGA portion.

Speaking from experience...although I know it is not *supposed* to cause any 
problems.

Paul 

Bo wrote:
> "Alice" <ixqnxjpumxklao@mailinator.com> wrote in message
> news:1138292638.466785.192420@g47g2000cwa.googlegroups.com...
>> Thanks for the replies, I appologize about the flash error (instead
>> of PLD).
>
> Alice,
>
> No need to apologize... perhaps my tone came across wrong... I was
> expressing disappointment because a JTAG Flash IC would be really,
> really, really cool.
>
I'm quite sure, Intel strata flash has a JTAG interface. Alternatively, you
can download some flash programming code to the microprocessor and get it to
do the work.

Alice wrote:
> Thanks for the replies, I appologize about the flash error (instead of
> PLD).  I have another question.  If I had an ARM chip and an xscale
> chip, and I connected TDI/TDO (and the other jtag pins) to the correct
> places on the ARM chip, would the same jtag cable/device work on the
> xscale chip if they were connected to the proper pins?  I'm confused if
> each jtag cable/device is chip specific (is a jtag device used to
> communicate with an arm chip is different than one needed to
> communicate with an xscale chip?)

Look for the terms BYPASS and CHAIN.
IIRC, One JTAG mode, BYPASS, is to reduce the 'skipped' device to a 
single FF, and you chain many JTAG devices - that's in theory....

You will find a few threads where the chain position matters, and
some JTAG tools fail depending on position. This can be SW oversight,
or sometimes bugs in the JTAG implementation - IC vendors tend to do
chain testing late in their design flows :)

-jg