Changing refresh rate for DRAM while in operation?

On Oct 25, 4:20 pm, sendt...@gmail.com wrote:
> > Since the OP seems to have disappeared to wherever OPs go, I
> > suspect we will never find out.
>
> I didn't disappear, I posted a reply but for some reason it didn't
> show up... I didn't want to accidentally spam the newsgroups by
> reposting and figured I'd wait to make sure it wasn't just my
> newsreader or ISP causing the problem.
>
> Anyway, I guess I'll answer the reason why I want to do this in the
> same post.
>
> I'm trying to characterize a DRAM device in certain environmental
> (radiation) conditions and see how that effects the retention
> characteristics. I'm not sure if there tests the industry uses to do
> this, but I needed to evaluate it realtime.
>
> I'm using the core Altera provided but all the code is there (except
> for the NIOS II cpu). So I have direct access to the SDRAM
> controller.

I think it would be really tough to do what you want to do.  The
reason is that DRAM cell retention time charcteristics are not always
deterministic.  Some cells will retain data for hundreds of
milliseconds, while other cells will retain data for tens of seconds,
and they don't always stay in the "hundreds of millisecond" bit or the
"tens of seconds" bin.

Ravi Venkatesan's paper has some numbers of DRAM cell retention time
characteristics [Venkatesan2006].

What this paper doesn't talk about, and what will hurt you is the
Variable Retention Time (VRT) characteristics of DRAM cells. That is,
a given DRAM cell can retain data for tens of seconds most of the
time, but once in a while, it can become a leaky cell that only
retains data for tens of milliseconds. End users sometimes refer to
this as being a "weak bit".
[Yaney1987,Restle1992,Ueno1998,Mori2005,Kim2004]

Now, if you're trying to use the DRAM device as a SEU detector of some
sort, it depends on how much radiation you expect.  If there are a lot
of radiation in your environment, then you don't need to do a lot of
work beforehand to prepare your sample. If, however, you want to
measure something that's very subtle, and maybe someone that would
occur no more frequent than once per X minutes, then you'd really have
to spend a couple of months with a DRAM device and a tester in a cave
50 feet below ground (need to make sure that there are no neutrons
hitting the DRAM while you're characterising it), then characterise it
to the level so that you'll be able say with some level of
mathematical confidence that you know where all the weak bits in the
DRAM device are.

Then, once you know what your device looks like, then you take it to
the environment where you want to use it to measure your SEU rate,
then you'd be able to (to some degree) distinguish between a cell that
failed "early" because it has some built-in VRT characteristic, as
opposed to a cell that failed because of a SEU.

Good luck
David

@INPROCEEDINGS{Venkatesan2006, author = {Ravi K. Venkatesan, Stephen
Herr, Eric Rotenberg}, title = {Retention-Aware Placement in DRAM
(RAPID):Software Methods for Quasi-Non-Volatile DRAM}, booktitle =
{Proceedings of the 12th International Symposium on High Performance
Computer Architecture}, year = {2006}, pages = {157-167}}

@INPROCEEDINGS{Yaney1987, author = {D. S. Yaney, C. Y. Lu, R. A.
Kohler, M. J. Kelly, J. T. Nelson}, title = {A Meta-Stable Leakage
Phenonmenon in DRAM Charge Storage - Variable Hold Time}, booktitle =
{International Electron Devices Meeting Technical Digest}, year =
{1987}, pages = {336-338}}

@INPROCEEDINGS{Restle1992, author = {P. J. Restle, J. W. Park, B. F.
Lloyd}, title = {DRAM Variable Retention Time}, booktitle =
{International Electron Devices Meeting Technical Digest}, year =
{1992}, pages = {807-810}}

@INPROCEEDINGS{Ueno1998, author = {S. Ueno, T. Yamashita, H. Oda, S.
Komori, Y. Inoue, T. Nishimura}, title = {Leakage Current Observation
on Irregular Local Pn Junction Forming the Tail Distribution of DRAM
Retention Time Characteristics}, booktitle = {International Electron
Devices Meeting Technical Digest}, year = {1998}, pages = {153-156}}

@INPROCEEDINGS{Mori2005, author = {Yuki Mori, Kiyonori Ohyu, Kensuke
Okonogi, Ren-ichi Yamada}, title = {The Origins of Variable Retention
Time in DRAM}, booktitle = {International Electron Devices Meeting
Technical Digest}, year = {2005}, pages = {1057-1060}}

@INPROCEEDINGS{Kim2004, author = {Y. I. Kim, K. H. Yang, W. S. Lee},
title = {Thermal Degradation of DRAM Retention Time: Characterization
and Improving Techniques}, booktitle = {Proceedings of the 42nd Annual
International Reliability Physics Symposium}, year = {2004}, pages =
{667-668}}

On Oct 28, 10:18 pm, davewang202 <davewang...@gmail.com> wrote:
> On Oct 25, 4:20 pm, sendt...@gmail.com wrote:
>
>
>
>
>
> > > Since the OP seems to have disappeared to wherever OPs go, I
> > > suspect we will never find out.
>
> > I didn't disappear, I posted a reply but for some reason it didn't
> > show up... I didn't want to accidentally spam the newsgroups by
> > reposting and figured I'd wait to make sure it wasn't just my
> > newsreader or ISP causing the problem.
>
> > Anyway, I guess I'll answer the reason why I want to do this in the
> > same post.
>
> > I'm trying to characterize a DRAM device in certain environmental
> > (radiation) conditions and see how that effects the retention
> > characteristics. I'm not sure if there tests the industry uses to do
> > this, but I needed to evaluate it realtime.
>
> > I'm using the core Altera provided but all the code is there (except
> > for the NIOS II cpu). So I have direct access to the SDRAM
> > controller.
>
> I think it would be really tough to do what you want to do.  The
> reason is that DRAM cell retention time charcteristics are not always
> deterministic.  Some cells will retain data for hundreds of
> milliseconds, while other cells will retain data for tens of seconds,
> and they don't always stay in the "hundreds of millisecond" bit or the
> "tens of seconds" bin.
>
> Ravi Venkatesan's paper has some numbers of DRAM cell retention time
> characteristics [Venkatesan2006].
>
> What this paper doesn't talk about, and what will hurt you is the
> Variable Retention Time (VRT) characteristics of DRAM cells. That is,
> a given DRAM cell can retain data for tens of seconds most of the
> time, but once in a while, it can become a leaky cell that only
> retains data for tens of milliseconds. End users sometimes refer to
> this as being a "weak bit".
> [Yaney1987,Restle1992,Ueno1998,Mori2005,Kim2004]
>
> Now, if you're trying to use the DRAM device as a SEU detector of some
> sort, it depends on how much radiation you expect.  If there are a lot
> of radiation in your environment, then you don't need to do a lot of
> work beforehand to prepare your sample. If, however, you want to
> measure something that's very subtle, and maybe someone that would
> occur no more frequent than once per X minutes, then you'd really have
> to spend a couple of months with a DRAM device and a tester in a cave
> 50 feet below ground (need to make sure that there are no neutrons
> hitting the DRAM while you're characterising it), then characterise it
> to the level so that you'll be able say with some level of
> mathematical confidence that you know where all the weak bits in the
> DRAM device are.
>
> Then, once you know what your device looks like, then you take it to
> the environment where you want to use it to measure your SEU rate,
> then you'd be able to (to some degree) distinguish between a cell that
> failed "early" because it has some built-in VRT characteristic, as
> opposed to a cell that failed because of a SEU.
>
> Good luck
> David
>
> @INPROCEEDINGS{Venkatesan2006, author = {Ravi K. Venkatesan, Stephen
> Herr, Eric Rotenberg}, title = {Retention-Aware Placement in DRAM
> (RAPID):Software Methods for Quasi-Non-Volatile DRAM}, booktitle =
> {Proceedings of the 12th International Symposium on High Performance
> Computer Architecture}, year = {2006}, pages = {157-167}}
>
> @INPROCEEDINGS{Yaney1987, author = {D. S. Yaney, C. Y. Lu, R. A.
> Kohler, M. J. Kelly, J. T. Nelson}, title = {A Meta-Stable Leakage
> Phenonmenon in DRAM Charge Storage - Variable Hold Time}, booktitle =
> {International Electron Devices Meeting Technical Digest}, year =
> {1987}, pages = {336-338}}
>
> @INPROCEEDINGS{Restle1992, author = {P. J. Restle, J. W. Park, B. F.
> Lloyd}, title = {DRAM Variable Retention Time}, booktitle =
> {International Electron Devices Meeting Technical Digest}, year =
> {1992}, pages = {807-810}}
>
> @INPROCEEDINGS{Ueno1998, author = {S. Ueno, T. Yamashita, H. Oda, S.
> Komori, Y. Inoue, T. Nishimura}, title = {Leakage Current Observation
> on Irregular Local Pn Junction Forming the Tail Distribution of DRAM
> Retention Time Characteristics}, booktitle = {International Electron
> Devices Meeting Technical Digest}, year = {1998}, pages = {153-156}}
>
> @INPROCEEDINGS{Mori2005, author = {Yuki Mori, Kiyonori Ohyu, Kensuke
> Okonogi, Ren-ichi Yamada}, title = {The Origins of Variable Retention
> Time in DRAM}, booktitle = {International Electron Devices Meeting
> Technical Digest}, year = {2005}, pages = {1057-1060}}
>
> @INPROCEEDINGS{Kim2004, author = {Y. I. Kim, K. H. Yang, W. S. Lee},
> title = {Thermal Degradation of DRAM Retention Time: Characterization
> and Improving Techniques}, booktitle = {Proceedings of the 42nd Annual
> International Reliability Physics Symposium}, year = {2004}, pages =
> {667-668}}- Hide quoted text -
>
> - Show quoted text -

You brought up some interesting points that I didn't know. I knew that
different cells had different retention times but I was not aware
there was variation in the same cell. That's definitely a problem...