Active filter stage as driver for ADC good or bad?

Thank you all for your input :-)

Steve Underwood wrote:
> Tim Wescott wrote:
>> On Sat, 03 Nov 2007 08:40:43 -0700, Joerg wrote:
>>
>>> Electric wrote:
>>>> "Randy Yates" <yates@ieee.org>  writes:
>>>>
>>>>
>>>>> But to be sure, compute the output impedance explicitly. Form a
>>>>> small-signal equivalent circuit model of the BP filter circult. You 
>>>>> can
>>>>> do this using the ideal op-amp model, i.e., no current flows into the
>>>>> inputs and the positive and negative inputs are maintained at the same
>>>>> levels. Then short the (voltage) input and compute the output 
>>>>> impedance
>>>>> by connecting a fictitious "test source" V_x at the output and
>>>>> determining the output current I_x that would flow into the output 
>>>>> (back
>>>>> into the BP circuit).  The output impedance is then V_x / I_x.
>>>>>
>>>>> Armed with the knowledge of the output impedance, find the input
>>>>> impedance of the ADC on the datasheet. It should be at least a 
>>>>> factor of
>>>>> 10 (the higher the better) more than the output impedance of your
>>>>> circuit.
>>>> Thank you, I will try to do that. :-)
>>>>
>>> Just keep in mind that some ADCs chrage/discharge an on-chip cap that 
>>> hangs right across the input. The driving stage must then be up to 
>>> snuff to deal with that.
>>>
>>
>> The ones that do that will tell you in the data sheets, and they'll tell
>> you what level of charge injection you can expect when the ADC 
>> samples. What your filter/amplifier _really_ needs to do is to have 
>> that cap at the
>> right voltage when the next sample commences.
>>
>> The way that I've seen this done is to model the cap and the charge
>> injection, then make sure that the filter/buffer settles to within the
>> ADC's ENOB error within the ADC sample time -- plus a bit or two to
>> accommodate the inevitable loss of precision when you go from mathemagic
>> land to the real world.
>>
> Unless its a sigma-delta converter, or has explicit anti-alias filtering 
> or buffer amps on board, pretty much any converter applies a god awful 
> kick as the sampling gate opens. You not only need to ensure the output 
> impedance of the filter is low enough for the sampling to settle to the 
> required resolution within the gate time, you need to ensure those kicks 
> don't destabilise the analogue circuitry you are adding. I've seen amps 
> go kinda wacky when they are connected to an ADC.
> 
> People can be really woolly about the performance envelope of the things 
> which drive ADC inputs, whether passive or active.
> 

Yep. It's one of my bread and butter jobs. My recipe is to never, ever, 
split ground planes. Ever. That plus a nice stiff low-Z drive has always 
yielded the performance the clients wanted. Before the design change 
they often had 2-3 bits worth or "weirdness" in the data. For those with 
ground splits the data looked like Niagara falls.

-- 
Regards, Joerg

http://www.analogconsultants.com/

On Sun, 4 Nov 2007 22:09:43 +0100, in comp.arch.embedded "Electric"
<ElectricL@Electric.Electric> wrote:

>Thank you all for your input :-)
no probs.
It's nice to try and help, but choose a better/personal nickname, if
you are going to use newsgroups more often


Martin