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Hi all and Janet, Examine carefully the output impedance characteristics of R-R outputs before changing the design. Most, as their output nears the rail, are really, really bad. Since the LM324s in your current design have lots of supply head-room, changing amps could introduce large errors at the limits of conversion. Also worth mentioning, is the tendency of some amps to phase invert when driven with large inputs (the LM324's are noteable for not doing this). I have successfully used clamp diodes, like BAV99s, with series resistance as large as 100 ohms without any observable signal distortion. However, the Pink Book caution is warranted. All diodes, that I'm aware of, double their leakage current every 20 C. If you application involves large temperature swings, leakage could be an issue. Good luck, Scott --- Janet Lefko <> wrote: > Thanks for your thorough explanation. > > I am responsible for supporting and > redesigning/updating the product > (Pressure sensor data acquisition). I have decided > to change the sensor > op amps from LM324s driven with +/- 12V power to a > dual supply +/- 5V op > amp with rail to rail outputs. The LT1367, AD8032 > are a few of the op > amps I am considering. > > BTW, I got this job because of my prior experience > with the HC11 > although we will be upgrading to the HC12. I > haven't considered another > uP family, mainly because the HC12 is code > compatible with the existing > 12K HC11 code which I intend to modify where > necessary, but not rewrite! > > I have a question about the VDD, VSS clamp diodes. > I have used clamp > diodes in the past but the pink book, Sec 12.3, > states "External clamp > diodes should be avoided, because of additional > leakage currents, and > this along with source resistance can degrade the > signal". I still > think clamp diodes could be used, if the source > resistance is minimal ( > the pink book gives some numbers and so does Mark) > and I'm sure that > with some research a low leakage diode could be > selected. > > Janet Lefko > > Electrical Engineer > > Tekscan, Inc. > > 617 464-4500 x235 > > -----Original Message----- > From: Mark Schultz [mailto:] > Sent: Thursday, January 22, 2004 6:46 PM > To: > Subject: [m68HC11] Re: Analog to Digital Converter > Inputs > > Your understanding is essentially correct. In my > own designs, I > take measures to prevent any ADC source signal from > significantly > exceeding Vdd (usually 5.0V on a HC11 design). The > 'absolute > maximum' specs might allow a AVref up to 7.0V, but I > would not > recommend AVref > 5.0V (or AVref > Vdd) myself. > > Also, to ensure best accuracy, mononticity, and > differential > linearity response, it is best to select a AVref > that is the same > voltage (approximately) as the device Vdd power > supply. The wider > the range between AVgnd and AVref, the more accurate > your > conversions will be, in general. > > If, as you say in your message, your signal source > can go as high as > 11V, you can use a simple resistor-divider to scale > the level down > to a 5.0V max level. Since the AD inputs of the > HC11 are connected > (when selected for conversion) to an internal > capacitor of approx. > 20pF, it is best to provide a low-impedance source > to the device. A > small part of the overall conversion time is > allocated towards > charging the sampling capacitor array, but a signal > with too high of > an impedance (>10K as I recall) will result in > potentially > inaccurate conversions, depending on the charge > present (or not > present) on the capacitor array from the previous > conversion. The > following circuit provides a fairly robust and > error-safe signal for > the HC11 (or any other uC that uses a > switched-capacitor ADC input): > > . R1 Non-inverting D1 > .Sig >---/\/\/---o follower (opamp) o--->|--- > Vdd (+5) > . | |\ | > . o------/\/\/---o-------| > |----/\/\/---o------------> To MCU > ._|_ R2 |/ 470 | D2 > .Gnd o---|<--- > Vss (Gnd) > > Set R1 & R2 for the appropriate voltage division > ratio. > VOut = VIn * R2 / (R1 + R2) > If VInV and desired VOut = 5V, suggest R1K and > R2K. > > The op-amp follower (noninverting buffer) is > suggested to ensure > that a low-impedance source is provided to the > microcontroller. The > 470 ohm resistor and back-to-back diodes serve as a > crude > under/overvoltage clamp. This is not bulletproof > since the diode > drops will allow voltages 0.6V (approx) under/over > Vss and Vdd to > get through, but such overages should not damage the > device as long > as they are not prolonged. There are doubtless more > sophisticated > approaches that could be used to prevent > under/overvoltages from > reaching the MCU ADC input(s), but I find that this > fairly simple > arrangement serves for most applications. > > Since you mentioned that you were a EE, odds are you > know more about > such techniques than I do ;) The level of detail > provided here is > for the benefit of those who do not necessarily have > a full EE > background (which includes myself ;). > --- In , "Janet Lefko" > <jlefko@t...> wrote: > > I am supporting a design that utilizes the AD > converter. > > > > The AD reference voltage in this design can be > varied from 0.4 V > > to 4.0 V changing the sensitivity range. > > > > The AD input voltage can be as high as 11V. > > > > I don't see a maximum input voltage spec on the AD > inputs?? > > The maximum ratings lists "Input Voltage Vin 0.3 > to +7.0" > > > > In my experience, I believe it is not advisable to > overdrive the > > analog to digital converter greater than VCC (in > this case 5V) or > > latch up can occur. > > > > Please advise. > > > _____ > > > . > > [Non-text portions of this message have been > removed] > === message truncated === __________________________________ |
Analog to Digital Converter Inputs
Started by ●January 19, 2004
Reply by ●January 23, 20042004-01-23
