OMG! Being a hardware guy I assume the signals have been checked...right? :)
--- In l..., "rolf_meeser" wrote:
>
> Hi Mike,
>
> --- In l..., mjscott@ wrote:
> > Static Init is:
> >
> > EMCStaticConfig0 = 0x1 | (1 << 19);
> > EMCStaticWaitRd0 = 1f;
> > EMCStaticWaitTurn0 = 0x0f;
> > EMCStaticWaitWen0 = 2;
> > EMCStaticWaitWr0 = 0x1f;
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> With this bit currently being cleared, you're lacking the write pulse at
the WE pin!
>
> Regards,
> Rolf
>
EMC & Flash
Started by ●October 7, 2009
Reply by ●October 8, 20092009-10-08
Reply by ●October 8, 20092009-10-08
Rolf,
Thanks. The PB bit seemed to point to chips with individual byte controls
(upper and lower) which my flash does not have. Interestingly the WE did
have a pulse on it without the PB bit being set; it was narrow but
definitely there. Setting the PB bit does make it more pronounced. Did NXP
publish any detailed information about the EMC, I find the explanations for
the different control registers very thin.
Mike
_____
From: rolf_meeser [mailto:r...@yahoo.de]
Sent: Thursday, October 08, 2009 9:12 AM
To: l...
Subject: [lpc2000] Re: EMC & Flash
Hi Mike,
--- In lpc2000@yahoogroups .com,
mjscott@... wrote:
> Static Init is:
>
> EMCStaticConfig0 = 0x1 | (1 << 19);
> EMCStaticWaitRd0 = 1f;
> EMCStaticWaitTurn0 = 0x0f;
> EMCStaticWaitWen0 = 2;
> EMCStaticWaitWr0 = 0x1f;
>
Try setting bit 7 (PB) in EMCStaticConfig0.
With this bit currently being cleared, you're lacking the write pulse at the
WE pin!
Regards,
Rolf
Thanks. The PB bit seemed to point to chips with individual byte controls
(upper and lower) which my flash does not have. Interestingly the WE did
have a pulse on it without the PB bit being set; it was narrow but
definitely there. Setting the PB bit does make it more pronounced. Did NXP
publish any detailed information about the EMC, I find the explanations for
the different control registers very thin.
Mike
_____
From: rolf_meeser [mailto:r...@yahoo.de]
Sent: Thursday, October 08, 2009 9:12 AM
To: l...
Subject: [lpc2000] Re: EMC & Flash
Hi Mike,
--- In lpc2000@yahoogroups .com,
mjscott@... wrote:
> Static Init is:
>
> EMCStaticConfig0 = 0x1 | (1 << 19);
> EMCStaticWaitRd0 = 1f;
> EMCStaticWaitTurn0 = 0x0f;
> EMCStaticWaitWen0 = 2;
> EMCStaticWaitWr0 = 0x1f;
>
Try setting bit 7 (PB) in EMCStaticConfig0.
With this bit currently being cleared, you're lacking the write pulse at the
WE pin!
Regards,
Rolf
Reply by ●October 8, 20092009-10-08
Hi Mike,
The narrow WE pulses are the refresh cycles of you SDRAM. During write attempts to the flash WE should have been completely inactive.
So it's working now for you?
Regarding the manual, it does indeed have room for improvement...
Rolf
--- In l..., "Michael J Scott" wrote:
>
> Rolf,
>
>
>
> Thanks. The PB bit seemed to point to chips with individual byte controls
> (upper and lower) which my flash does not have. Interestingly the WE did
> have a pulse on it without the PB bit being set; it was narrow but
> definitely there. Setting the PB bit does make it more pronounced. Did NXP
> publish any detailed information about the EMC, I find the explanations for
> the different control registers very thin.
>
>
>
> Mike
>
>
>
> _____
>
> From: rolf_meeser [mailto:rolfm_9dq@...]
> Sent: Thursday, October 08, 2009 9:12 AM
> To: l...
> Subject: [lpc2000] Re: EMC & Flash
>
>
>
>
>
> Hi Mike,
>
> --- In lpc2000@yahoogroups .com,
> mjscott@ wrote:
> > Static Init is:
> >
> > EMCStaticConfig0 = 0x1 | (1 << 19);
> > EMCStaticWaitRd0 = 1f;
> > EMCStaticWaitTurn0 = 0x0f;
> > EMCStaticWaitWen0 = 2;
> > EMCStaticWaitWr0 = 0x1f;
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> With this bit currently being cleared, you're lacking the write pulse at the
> WE pin!
>
> Regards,
> Rolf
>
>
>
The narrow WE pulses are the refresh cycles of you SDRAM. During write attempts to the flash WE should have been completely inactive.
So it's working now for you?
Regarding the manual, it does indeed have room for improvement...
Rolf
--- In l..., "Michael J Scott" wrote:
>
> Rolf,
>
>
>
> Thanks. The PB bit seemed to point to chips with individual byte controls
> (upper and lower) which my flash does not have. Interestingly the WE did
> have a pulse on it without the PB bit being set; it was narrow but
> definitely there. Setting the PB bit does make it more pronounced. Did NXP
> publish any detailed information about the EMC, I find the explanations for
> the different control registers very thin.
>
>
>
> Mike
>
>
>
> _____
>
> From: rolf_meeser [mailto:rolfm_9dq@...]
> Sent: Thursday, October 08, 2009 9:12 AM
> To: l...
> Subject: [lpc2000] Re: EMC & Flash
>
>
>
>
>
> Hi Mike,
>
> --- In lpc2000@yahoogroups .com,
> mjscott@ wrote:
> > Static Init is:
> >
> > EMCStaticConfig0 = 0x1 | (1 << 19);
> > EMCStaticWaitRd0 = 1f;
> > EMCStaticWaitTurn0 = 0x0f;
> > EMCStaticWaitWen0 = 2;
> > EMCStaticWaitWr0 = 0x1f;
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> With this bit currently being cleared, you're lacking the write pulse at the
> WE pin!
>
> Regards,
> Rolf
>
>
>
Reply by ●October 8, 20092009-10-08
Rolf,
I have WE from the LPC2478 attached to the WE for both the SDRAM and flash.
When I write to the flash the WE does pulse low at the same time that the
CS0 goes low.
As for working, I do get something other than 0xffff out of the flash, but
the ID for the flash manufacturer and part are not correct. I've written a
routine which will toggle the data and address lines to make sure that
everything is connected. So far the data lines have checked out ok. I get
some other strange behavior too. When I read from the flash and the CS0 and
OE go high I still see data on the data lines as if the flash is still
driving them. I'm trying to determine if it is the flash, SDRAM, or EMC that
is driving the data lines. Something is still not quite right. Could be a
bad chip.
Mike
_____
From: rolf_meeser [mailto:r...@yahoo.de]
Sent: Thursday, October 08, 2009 11:29 AM
To: l...
Subject: [lpc2000] Re: EMC & Flash
Hi Mike,
The narrow WE pulses are the refresh cycles of you SDRAM. During write
attempts to the flash WE should have been completely inactive.
So it's working now for you?
Regarding the manual, it does indeed have room for improvement...
Rolf
--- In lpc2000@yahoogroups .com, "Michael
J Scott" wrote:
>
> Rolf,
>
> Thanks. The PB bit seemed to point to chips with individual byte controls
> (upper and lower) which my flash does not have. Interestingly the WE did
> have a pulse on it without the PB bit being set; it was narrow but
> definitely there. Setting the PB bit does make it more pronounced. Did NXP
> publish any detailed information about the EMC, I find the explanations
for
> the different control registers very thin.
>
> Mike
>
> _____
>
> From: rolf_meeser [mailto:rolfm_9dq@...]
> Sent: Thursday, October 08, 2009 9:12 AM
> To: lpc2000@yahoogroups .com
> Subject: [lpc2000] Re: EMC & Flash
>
> Hi Mike,
>
> --- In lpc2000@yahoogroups .com,
> mjscott@ wrote:
> > Static Init is:
> >
> > EMCStaticConfig0 = 0x1 | (1 << 19);
> > EMCStaticWaitRd0 = 1f;
> > EMCStaticWaitTurn0 = 0x0f;
> > EMCStaticWaitWen0 = 2;
> > EMCStaticWaitWr0 = 0x1f;
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> With this bit currently being cleared, you're lacking the write pulse at
the
> WE pin!
>
> Regards,
> Rolf
>
>
>
I have WE from the LPC2478 attached to the WE for both the SDRAM and flash.
When I write to the flash the WE does pulse low at the same time that the
CS0 goes low.
As for working, I do get something other than 0xffff out of the flash, but
the ID for the flash manufacturer and part are not correct. I've written a
routine which will toggle the data and address lines to make sure that
everything is connected. So far the data lines have checked out ok. I get
some other strange behavior too. When I read from the flash and the CS0 and
OE go high I still see data on the data lines as if the flash is still
driving them. I'm trying to determine if it is the flash, SDRAM, or EMC that
is driving the data lines. Something is still not quite right. Could be a
bad chip.
Mike
_____
From: rolf_meeser [mailto:r...@yahoo.de]
Sent: Thursday, October 08, 2009 11:29 AM
To: l...
Subject: [lpc2000] Re: EMC & Flash
Hi Mike,
The narrow WE pulses are the refresh cycles of you SDRAM. During write
attempts to the flash WE should have been completely inactive.
So it's working now for you?
Regarding the manual, it does indeed have room for improvement...
Rolf
--- In lpc2000@yahoogroups .com, "Michael
J Scott" wrote:
>
> Rolf,
>
> Thanks. The PB bit seemed to point to chips with individual byte controls
> (upper and lower) which my flash does not have. Interestingly the WE did
> have a pulse on it without the PB bit being set; it was narrow but
> definitely there. Setting the PB bit does make it more pronounced. Did NXP
> publish any detailed information about the EMC, I find the explanations
for
> the different control registers very thin.
>
> Mike
>
> _____
>
> From: rolf_meeser [mailto:rolfm_9dq@...]
> Sent: Thursday, October 08, 2009 9:12 AM
> To: lpc2000@yahoogroups .com
> Subject: [lpc2000] Re: EMC & Flash
>
> Hi Mike,
>
> --- In lpc2000@yahoogroups .com,
> mjscott@ wrote:
> > Static Init is:
> >
> > EMCStaticConfig0 = 0x1 | (1 << 19);
> > EMCStaticWaitRd0 = 1f;
> > EMCStaticWaitTurn0 = 0x0f;
> > EMCStaticWaitWen0 = 2;
> > EMCStaticWaitWr0 = 0x1f;
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> With this bit currently being cleared, you're lacking the write pulse at
the
> WE pin!
>
> Regards,
> Rolf
>
>
>
Reply by ●October 8, 20092009-10-08
Maybe your chip selects are set up wrong and both Flash and Ram are
active at the same time?
Michael J Scott wrote:
>
>
> Rolf,
>
> I have WE from the LPC2478 attached to the WE for both the SDRAM and
> flash.
> When I write to the flash the WE does pulse low at the same time that the
> CS0 goes low.
>
> As for working, I do get something other than 0xffff out of the flash, but
> the ID for the flash manufacturer and part are not correct. I've written a
> routine which will toggle the data and address lines to make sure that
> everything is connected. So far the data lines have checked out ok. I get
> some other strange behavior too. When I read from the flash and the
> CS0 and
> OE go high I still see data on the data lines as if the flash is still
> driving them. I'm trying to determine if it is the flash, SDRAM, or
> EMC that
> is driving the data lines. Something is still not quite right. Could be a
> bad chip.
>
> Mike
>
> _____
>
> From: rolf_meeser [mailto:r...@yahoo.de
> ]
> Sent: Thursday, October 08, 2009 11:29 AM
> To: l...
> Subject: [lpc2000] Re: EMC & Flash
>
> Hi Mike,
>
> The narrow WE pulses are the refresh cycles of you SDRAM. During write
> attempts to the flash WE should have been completely inactive.
> So it's working now for you?
>
> Regarding the manual, it does indeed have room for improvement...
>
> Rolf
>
> --- In lpc2000@yahoogroups .com,
> "Michael
> J Scott" wrote:
> >
> > Rolf,
> >
> >
> >
> > Thanks. The PB bit seemed to point to chips with individual byte
> controls
> > (upper and lower) which my flash does not have. Interestingly the WE did
> > have a pulse on it without the PB bit being set; it was narrow but
> > definitely there. Setting the PB bit does make it more pronounced.
> Did NXP
> > publish any detailed information about the EMC, I find the explanations
> for
> > the different control registers very thin.
> >
> >
> >
> > Mike
> >
> >
> >
> > _____
> >
> > From: rolf_meeser [mailto:rolfm_9dq@...]
> > Sent: Thursday, October 08, 2009 9:12 AM
> > To: lpc2000@yahoogroups .com
> > Subject: [lpc2000] Re: EMC & Flash
> >
> >
> >
> >
> >
> > Hi Mike,
> >
> > --- In lpc2000@yahoogroups .com,
> > mjscott@ wrote:
> > > Static Init is:
> > >
> > > EMCStaticConfig0 = 0x1 | (1 << 19);
> > > EMCStaticWaitRd0 = 1f;
> > > EMCStaticWaitTurn0 = 0x0f;
> > > EMCStaticWaitWen0 = 2;
> > > EMCStaticWaitWr0 = 0x1f;
> > >
> >
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> > With this bit currently being cleared, you're lacking the write pulse at
> the
> > WE pin!
> >
> > Regards,
> > Rolf
> >
> >
> >
> >
> >
> >
> >
active at the same time?
Michael J Scott wrote:
>
>
> Rolf,
>
> I have WE from the LPC2478 attached to the WE for both the SDRAM and
> flash.
> When I write to the flash the WE does pulse low at the same time that the
> CS0 goes low.
>
> As for working, I do get something other than 0xffff out of the flash, but
> the ID for the flash manufacturer and part are not correct. I've written a
> routine which will toggle the data and address lines to make sure that
> everything is connected. So far the data lines have checked out ok. I get
> some other strange behavior too. When I read from the flash and the
> CS0 and
> OE go high I still see data on the data lines as if the flash is still
> driving them. I'm trying to determine if it is the flash, SDRAM, or
> EMC that
> is driving the data lines. Something is still not quite right. Could be a
> bad chip.
>
> Mike
>
> _____
>
> From: rolf_meeser [mailto:r...@yahoo.de
> ]
> Sent: Thursday, October 08, 2009 11:29 AM
> To: l...
> Subject: [lpc2000] Re: EMC & Flash
>
> Hi Mike,
>
> The narrow WE pulses are the refresh cycles of you SDRAM. During write
> attempts to the flash WE should have been completely inactive.
> So it's working now for you?
>
> Regarding the manual, it does indeed have room for improvement...
>
> Rolf
>
> --- In lpc2000@yahoogroups .com,
> "Michael
> J Scott" wrote:
> >
> > Rolf,
> >
> >
> >
> > Thanks. The PB bit seemed to point to chips with individual byte
> controls
> > (upper and lower) which my flash does not have. Interestingly the WE did
> > have a pulse on it without the PB bit being set; it was narrow but
> > definitely there. Setting the PB bit does make it more pronounced.
> Did NXP
> > publish any detailed information about the EMC, I find the explanations
> for
> > the different control registers very thin.
> >
> >
> >
> > Mike
> >
> >
> >
> > _____
> >
> > From: rolf_meeser [mailto:rolfm_9dq@...]
> > Sent: Thursday, October 08, 2009 9:12 AM
> > To: lpc2000@yahoogroups .com
> > Subject: [lpc2000] Re: EMC & Flash
> >
> >
> >
> >
> >
> > Hi Mike,
> >
> > --- In lpc2000@yahoogroups .com,
> > mjscott@ wrote:
> > > Static Init is:
> > >
> > > EMCStaticConfig0 = 0x1 | (1 << 19);
> > > EMCStaticWaitRd0 = 1f;
> > > EMCStaticWaitTurn0 = 0x0f;
> > > EMCStaticWaitWen0 = 2;
> > > EMCStaticWaitWr0 = 0x1f;
> > >
> >
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> > With this bit currently being cleared, you're lacking the write pulse at
> the
> > WE pin!
> >
> > Regards,
> > Rolf
> >
> >
> >
> >
> >
> >
> >
Reply by ●October 8, 20092009-10-08
Dave,
I considered that, but only one memory is selected at a time.
_____
From: Dave Such [mailto:d...@dgtech.com]
Sent: Thursday, October 08, 2009 11:57 AM
To: l...
Subject: Re: [lpc2000] Re: EMC & Flash
Maybe your chip selects are set up wrong and both Flash and Ram are
active at the same time?
Michael J Scott wrote:
> Rolf,
>
> I have WE from the LPC2478 attached to the WE for both the SDRAM and
> flash.
> When I write to the flash the WE does pulse low at the same time that the
> CS0 goes low.
>
> As for working, I do get something other than 0xffff out of the flash, but
> the ID for the flash manufacturer and part are not correct. I've written a
> routine which will toggle the data and address lines to make sure that
> everything is connected. So far the data lines have checked out ok. I get
> some other strange behavior too. When I read from the flash and the
> CS0 and
> OE go high I still see data on the data lines as if the flash is still
> driving them. I'm trying to determine if it is the flash, SDRAM, or
> EMC that
> is driving the data lines. Something is still not quite right. Could be a
> bad chip.
>
> Mike
>
> _____
>
> From: rolf_meeser [mailto:rolfm_9dq@yahoo.
de
> ]
> Sent: Thursday, October 08, 2009 11:29 AM
> To: lpc2000@yahoogroups .com
> Subject: [lpc2000] Re: EMC & Flash
>
> Hi Mike,
>
> The narrow WE pulses are the refresh cycles of you SDRAM. During write
> attempts to the flash WE should have been completely inactive.
> So it's working now for you?
>
> Regarding the manual, it does indeed have room for improvement...
>
> Rolf
>
> --- In lpc2000@yahoogroups .com,
> "Michael
> J Scott" wrote:
> >
> > Rolf,
> >
> >
> >
> > Thanks. The PB bit seemed to point to chips with individual byte
> controls
> > (upper and lower) which my flash does not have. Interestingly the WE did
> > have a pulse on it without the PB bit being set; it was narrow but
> > definitely there. Setting the PB bit does make it more pronounced.
> Did NXP
> > publish any detailed information about the EMC, I find the explanations
> for
> > the different control registers very thin.
> >
> >
> >
> > Mike
> >
> >
> >
> > _____
> >
> > From: rolf_meeser [mailto:rolfm_9dq@...]
> > Sent: Thursday, October 08, 2009 9:12 AM
> > To: lpc2000@yahoogroups .com
> > Subject: [lpc2000] Re: EMC & Flash
> >
> >
> >
> >
> >
> > Hi Mike,
> >
> > --- In lpc2000@yahoogroups .com,
> > mjscott@ wrote:
> > > Static Init is:
> > >
> > > EMCStaticConfig0 = 0x1 | (1 << 19);
> > > EMCStaticWaitRd0 = 1f;
> > > EMCStaticWaitTurn0 = 0x0f;
> > > EMCStaticWaitWen0 = 2;
> > > EMCStaticWaitWr0 = 0x1f;
> > >
> >
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> > With this bit currently being cleared, you're lacking the write pulse at
> the
> > WE pin!
> >
> > Regards,
> > Rolf
> >
> >
> >
> >
> >
> >
> >
I considered that, but only one memory is selected at a time.
_____
From: Dave Such [mailto:d...@dgtech.com]
Sent: Thursday, October 08, 2009 11:57 AM
To: l...
Subject: Re: [lpc2000] Re: EMC & Flash
Maybe your chip selects are set up wrong and both Flash and Ram are
active at the same time?
Michael J Scott wrote:
> Rolf,
>
> I have WE from the LPC2478 attached to the WE for both the SDRAM and
> flash.
> When I write to the flash the WE does pulse low at the same time that the
> CS0 goes low.
>
> As for working, I do get something other than 0xffff out of the flash, but
> the ID for the flash manufacturer and part are not correct. I've written a
> routine which will toggle the data and address lines to make sure that
> everything is connected. So far the data lines have checked out ok. I get
> some other strange behavior too. When I read from the flash and the
> CS0 and
> OE go high I still see data on the data lines as if the flash is still
> driving them. I'm trying to determine if it is the flash, SDRAM, or
> EMC that
> is driving the data lines. Something is still not quite right. Could be a
> bad chip.
>
> Mike
>
> _____
>
> From: rolf_meeser [mailto:rolfm_9dq@yahoo.
de
> ]
> Sent: Thursday, October 08, 2009 11:29 AM
> To: lpc2000@yahoogroups .com
> Subject: [lpc2000] Re: EMC & Flash
>
> Hi Mike,
>
> The narrow WE pulses are the refresh cycles of you SDRAM. During write
> attempts to the flash WE should have been completely inactive.
> So it's working now for you?
>
> Regarding the manual, it does indeed have room for improvement...
>
> Rolf
>
> --- In lpc2000@yahoogroups .com,
> "Michael
> J Scott" wrote:
> >
> > Rolf,
> >
> >
> >
> > Thanks. The PB bit seemed to point to chips with individual byte
> controls
> > (upper and lower) which my flash does not have. Interestingly the WE did
> > have a pulse on it without the PB bit being set; it was narrow but
> > definitely there. Setting the PB bit does make it more pronounced.
> Did NXP
> > publish any detailed information about the EMC, I find the explanations
> for
> > the different control registers very thin.
> >
> >
> >
> > Mike
> >
> >
> >
> > _____
> >
> > From: rolf_meeser [mailto:rolfm_9dq@...]
> > Sent: Thursday, October 08, 2009 9:12 AM
> > To: lpc2000@yahoogroups .com
> > Subject: [lpc2000] Re: EMC & Flash
> >
> >
> >
> >
> >
> > Hi Mike,
> >
> > --- In lpc2000@yahoogroups .com,
> > mjscott@ wrote:
> > > Static Init is:
> > >
> > > EMCStaticConfig0 = 0x1 | (1 << 19);
> > > EMCStaticWaitRd0 = 1f;
> > > EMCStaticWaitTurn0 = 0x0f;
> > > EMCStaticWaitWen0 = 2;
> > > EMCStaticWaitWr0 = 0x1f;
> > >
> >
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> > With this bit currently being cleared, you're lacking the write pulse at
> the
> > WE pin!
> >
> > Regards,
> > Rolf
> >
> >
> >
> >
> >
> >
> >
Reply by ●October 8, 20092009-10-08
FYI, The EMC appears to have a 256 byte read buffer. So if you were
repeatable reading from the same location (or any location which is not more
than 256 bytes away), the EMC reads from the internal buffer and does not
actually read from the memory (at least on the static side) .That might be a
problem for someone who wants to put something other than memory on the EMC.
_____
From: rolf_meeser [mailto:r...@yahoo.de]
Sent: Thursday, October 08, 2009 11:29 AM
To: l...
Subject: [lpc2000] Re: EMC & Flash
Hi Mike,
The narrow WE pulses are the refresh cycles of you SDRAM. During write
attempts to the flash WE should have been completely inactive.
So it's working now for you?
Regarding the manual, it does indeed have room for improvement...
Rolf
--- In lpc2000@yahoogroups .com, "Michael
J Scott" wrote:
>
> Rolf,
>
> Thanks. The PB bit seemed to point to chips with individual byte controls
> (upper and lower) which my flash does not have. Interestingly the WE did
> have a pulse on it without the PB bit being set; it was narrow but
> definitely there. Setting the PB bit does make it more pronounced. Did NXP
> publish any detailed information about the EMC, I find the explanations
for
> the different control registers very thin.
>
> Mike
>
> _____
>
> From: rolf_meeser [mailto:rolfm_9dq@...]
> Sent: Thursday, October 08, 2009 9:12 AM
> To: lpc2000@yahoogroups .com
> Subject: [lpc2000] Re: EMC & Flash
>
> Hi Mike,
>
> --- In lpc2000@yahoogroups .com,
> mjscott@ wrote:
> > Static Init is:
> >
> > EMCStaticConfig0 = 0x1 | (1 << 19);
> > EMCStaticWaitRd0 = 1f;
> > EMCStaticWaitTurn0 = 0x0f;
> > EMCStaticWaitWen0 = 2;
> > EMCStaticWaitWr0 = 0x1f;
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> With this bit currently being cleared, you're lacking the write pulse at
the
> WE pin!
>
> Regards,
> Rolf
>
>
>
repeatable reading from the same location (or any location which is not more
than 256 bytes away), the EMC reads from the internal buffer and does not
actually read from the memory (at least on the static side) .That might be a
problem for someone who wants to put something other than memory on the EMC.
_____
From: rolf_meeser [mailto:r...@yahoo.de]
Sent: Thursday, October 08, 2009 11:29 AM
To: l...
Subject: [lpc2000] Re: EMC & Flash
Hi Mike,
The narrow WE pulses are the refresh cycles of you SDRAM. During write
attempts to the flash WE should have been completely inactive.
So it's working now for you?
Regarding the manual, it does indeed have room for improvement...
Rolf
--- In lpc2000@yahoogroups .com, "Michael
J Scott" wrote:
>
> Rolf,
>
> Thanks. The PB bit seemed to point to chips with individual byte controls
> (upper and lower) which my flash does not have. Interestingly the WE did
> have a pulse on it without the PB bit being set; it was narrow but
> definitely there. Setting the PB bit does make it more pronounced. Did NXP
> publish any detailed information about the EMC, I find the explanations
for
> the different control registers very thin.
>
> Mike
>
> _____
>
> From: rolf_meeser [mailto:rolfm_9dq@...]
> Sent: Thursday, October 08, 2009 9:12 AM
> To: lpc2000@yahoogroups .com
> Subject: [lpc2000] Re: EMC & Flash
>
> Hi Mike,
>
> --- In lpc2000@yahoogroups .com,
> mjscott@ wrote:
> > Static Init is:
> >
> > EMCStaticConfig0 = 0x1 | (1 << 19);
> > EMCStaticWaitRd0 = 1f;
> > EMCStaticWaitTurn0 = 0x0f;
> > EMCStaticWaitWen0 = 2;
> > EMCStaticWaitWr0 = 0x1f;
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> With this bit currently being cleared, you're lacking the write pulse at
the
> WE pin!
>
> Regards,
> Rolf
>
>
>
Reply by ●October 8, 20092009-10-08
Hi,
Now I am able to read the product ID from external flash memory, I am using
the CS1 and a spansion GL256P, A1...A23. Try to execute the code like that?
extern Int32U NVRAM_BASE_ADDR;
#define FLASH_NVRAM_BASE_ADDR ((Int32U)&NVRAM_BASE_ADDR)
EMCSTATICCNFG1 = 0x0081 | (1 << 19);
EMCSTATICWAITWEN1 = 2;
EMCSTATICWAITOEN1 = 0;
EMCSTATICWAITRD1 = 0x1f;
EMCSTATICWAITPG1 = 0;
EMCSTATICWAITWR1 = 0x1f;
EMCSTATICWAITTURN1 = 0x0f;
void LerFlash (void)
{
unsigned short i, id1, id2, id3, id4, id5, id6;
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) 0x00aa;
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x2aa) << 1))) 0x0055;
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) 0x0090;
id1 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0000) <<
1)));
id2 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0001) <<
1)));
id3 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000e) <<
1)));
id4 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000f) <<
1)));
id5 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0003) <<
1)));
id6 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0002) <<
1)));
}
2009/10/8, Michael J Scott :
>
> FYI, The EMC appears to have a 256 byte read buffer. So if you were
> repeatable reading from the same location (or any location which is not
> more
> than 256 bytes away), the EMC reads from the internal buffer and does not
> actually read from the memory (at least on the static side) .That might be
> a
> problem for someone who wants to put something other than memory on the
> EMC.
>
> _____
>
> From: rolf_meeser [mailto:r...@yahoo.de ]
> Sent: Thursday, October 08, 2009 11:29 AM
> To: l...
> Subject: [lpc2000] Re: EMC & Flash
>
> Hi Mike,
>
> The narrow WE pulses are the refresh cycles of you SDRAM. During write
> attempts to the flash WE should have been completely inactive.
> So it's working now for you?
>
> Regarding the manual, it does indeed have room for improvement...
>
> Rolf
>
> --- In lpc2000@yahoogroups >
> .com, "Michael
> J Scott" wrote:
> >
> > Rolf,
> >
> >
> >
> > Thanks. The PB bit seemed to point to chips with individual byte controls
> > (upper and lower) which my flash does not have. Interestingly the WE did
> > have a pulse on it without the PB bit being set; it was narrow but
> > definitely there. Setting the PB bit does make it more pronounced. Did
> NXP
> > publish any detailed information about the EMC, I find the explanations
> for
> > the different control registers very thin.
> >
> >
> >
> > Mike
> >
> >
> >
> > _____
> >
> > From: rolf_meeser [mailto:rolfm_9dq@...]
> > Sent: Thursday, October 08, 2009 9:12 AM
> > To: lpc2000@yahoogroups >
> .com
> > Subject: [lpc2000] Re: EMC & Flash
> >
> >
> >
> >
> >
> > Hi Mike,
> >
> > --- In lpc2000@yahoogroups >
> .com,
> > mjscott@ wrote:
> > > Static Init is:
> > >
> > > EMCStaticConfig0 = 0x1 | (1 << 19);
> > > EMCStaticWaitRd0 = 1f;
> > > EMCStaticWaitTurn0 = 0x0f;
> > > EMCStaticWaitWen0 = 2;
> > > EMCStaticWaitWr0 = 0x1f;
> > >
> >
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> > With this bit currently being cleared, you're lacking the write pulse at
> the
> > WE pin!
> >
> > Regards,
> > Rolf
> >
> >
> >
> >
> >
> >
> >
>
Now I am able to read the product ID from external flash memory, I am using
the CS1 and a spansion GL256P, A1...A23. Try to execute the code like that?
extern Int32U NVRAM_BASE_ADDR;
#define FLASH_NVRAM_BASE_ADDR ((Int32U)&NVRAM_BASE_ADDR)
EMCSTATICCNFG1 = 0x0081 | (1 << 19);
EMCSTATICWAITWEN1 = 2;
EMCSTATICWAITOEN1 = 0;
EMCSTATICWAITRD1 = 0x1f;
EMCSTATICWAITPG1 = 0;
EMCSTATICWAITWR1 = 0x1f;
EMCSTATICWAITTURN1 = 0x0f;
void LerFlash (void)
{
unsigned short i, id1, id2, id3, id4, id5, id6;
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) 0x00aa;
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x2aa) << 1))) 0x0055;
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) 0x0090;
id1 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0000) <<
1)));
id2 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0001) <<
1)));
id3 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000e) <<
1)));
id4 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000f) <<
1)));
id5 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0003) <<
1)));
id6 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0002) <<
1)));
}
2009/10/8, Michael J Scott :
>
> FYI, The EMC appears to have a 256 byte read buffer. So if you were
> repeatable reading from the same location (or any location which is not
> more
> than 256 bytes away), the EMC reads from the internal buffer and does not
> actually read from the memory (at least on the static side) .That might be
> a
> problem for someone who wants to put something other than memory on the
> EMC.
>
> _____
>
> From: rolf_meeser [mailto:r...@yahoo.de ]
> Sent: Thursday, October 08, 2009 11:29 AM
> To: l...
> Subject: [lpc2000] Re: EMC & Flash
>
> Hi Mike,
>
> The narrow WE pulses are the refresh cycles of you SDRAM. During write
> attempts to the flash WE should have been completely inactive.
> So it's working now for you?
>
> Regarding the manual, it does indeed have room for improvement...
>
> Rolf
>
> --- In lpc2000@yahoogroups >
> .com, "Michael
> J Scott" wrote:
> >
> > Rolf,
> >
> >
> >
> > Thanks. The PB bit seemed to point to chips with individual byte controls
> > (upper and lower) which my flash does not have. Interestingly the WE did
> > have a pulse on it without the PB bit being set; it was narrow but
> > definitely there. Setting the PB bit does make it more pronounced. Did
> NXP
> > publish any detailed information about the EMC, I find the explanations
> for
> > the different control registers very thin.
> >
> >
> >
> > Mike
> >
> >
> >
> > _____
> >
> > From: rolf_meeser [mailto:rolfm_9dq@...]
> > Sent: Thursday, October 08, 2009 9:12 AM
> > To: lpc2000@yahoogroups >
> .com
> > Subject: [lpc2000] Re: EMC & Flash
> >
> >
> >
> >
> >
> > Hi Mike,
> >
> > --- In lpc2000@yahoogroups >
> .com,
> > mjscott@ wrote:
> > > Static Init is:
> > >
> > > EMCStaticConfig0 = 0x1 | (1 << 19);
> > > EMCStaticWaitRd0 = 1f;
> > > EMCStaticWaitTurn0 = 0x0f;
> > > EMCStaticWaitWen0 = 2;
> > > EMCStaticWaitWr0 = 0x1f;
> > >
> >
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> > With this bit currently being cleared, you're lacking the write pulse at
> the
> > WE pin!
> >
> > Regards,
> > Rolf
> >
> >
> >
> >
> >
> >
> >
>
Reply by ●October 8, 20092009-10-08
Thanks all. Changed the chip and everything is working correctly. The EMC
read buffer is going to be an issue for checking status while programming or
erasing, I have a plan though.
Thanks again.
Mike
_____
From: Alberto de Martini [mailto:a...@gmail.com]
Sent: Thursday, October 08, 2009 1:45 PM
To: l...
Subject: Re: [lpc2000] Re: EMC & Flash
Hi,
Now I am able to read the product ID from external flash memory, I am using
the CS1 and a spansion GL256P, A1...A23. Try to execute the code like that?
extern Int32U NVRAM_BASE_ADDR;
#define FLASH_NVRAM_BASE_ADDR ((Int32U)&NVRAM_BASE_ADDR)
EMCSTATICCNFG1 = 0x0081 | (1 << 19);
EMCSTATICWAITWEN1 = 2;
EMCSTATICWAITOEN1 = 0;
EMCSTATICWAITRD1 = 0x1f;
EMCSTATICWAITPG1 = 0;
EMCSTATICWAITWR1 = 0x1f;
EMCSTATICWAITTURN1 = 0x0f;
void LerFlash (void)
{
unsigned short i, id1, id2, id3, id4, id5, id6;
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) 0x00aa;
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x2aa) << 1))) 0x0055;
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) 0x0090;
id1 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0000) <<
1)));
id2 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0001) <<
1)));
id3 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000e) <<
1)));
id4 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000f) <<
1)));
id5 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0003) <<
1)));
id6 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0002) <<
1)));
}
2009/10/8, Michael J Scott
com>:
>
> FYI, The EMC appears to have a 256 byte read buffer. So if you were
> repeatable reading from the same location (or any location which is not
> more
> than 256 bytes away), the EMC reads from the internal buffer and does not
> actually read from the memory (at least on the static side) .That might be
> a
> problem for someone who wants to put something other than memory on the
> EMC.
>
> _____
>
> From: rolf_meeser [mailto:rolfm_9dq@yahoo.
de ]
> Sent: Thursday, October 08, 2009 11:29 AM
> To: lpc2000@yahoogroups .com
> Subject: [lpc2000] Re: EMC & Flash
>
> Hi Mike,
>
> The narrow WE pulses are the refresh cycles of you SDRAM. During write
> attempts to the flash WE should have been completely inactive.
> So it's working now for you?
>
> Regarding the manual, it does indeed have room for improvement...
>
> Rolf
>
> --- In lpc2000@yahoogroups
>
> .com, "Michael
> J Scott" wrote:
> >
> > Rolf,
> >
> >
> >
> > Thanks. The PB bit seemed to point to chips with individual byte
controls
> > (upper and lower) which my flash does not have. Interestingly the WE did
> > have a pulse on it without the PB bit being set; it was narrow but
> > definitely there. Setting the PB bit does make it more pronounced. Did
> NXP
> > publish any detailed information about the EMC, I find the explanations
> for
> > the different control registers very thin.
> >
> >
> >
> > Mike
> >
> >
> >
> > _____
> >
> > From: rolf_meeser [mailto:rolfm_9dq@...]
> > Sent: Thursday, October 08, 2009 9:12 AM
> > To: lpc2000@yahoogroups
>
> .com
> > Subject: [lpc2000] Re: EMC & Flash
> >
> >
> >
> >
> >
> > Hi Mike,
> >
> > --- In lpc2000@yahoogroups
>
> .com,
> > mjscott@ wrote:
> > > Static Init is:
> > >
> > > EMCStaticConfig0 = 0x1 | (1 << 19);
> > > EMCStaticWaitRd0 = 1f;
> > > EMCStaticWaitTurn0 = 0x0f;
> > > EMCStaticWaitWen0 = 2;
> > > EMCStaticWaitWr0 = 0x1f;
> > >
> >
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> > With this bit currently being cleared, you're lacking the write pulse at
> the
> > WE pin!
> >
> > Regards,
> > Rolf
> >
> >
> >
> >
> >
> >
> >
>
read buffer is going to be an issue for checking status while programming or
erasing, I have a plan though.
Thanks again.
Mike
_____
From: Alberto de Martini [mailto:a...@gmail.com]
Sent: Thursday, October 08, 2009 1:45 PM
To: l...
Subject: Re: [lpc2000] Re: EMC & Flash
Hi,
Now I am able to read the product ID from external flash memory, I am using
the CS1 and a spansion GL256P, A1...A23. Try to execute the code like that?
extern Int32U NVRAM_BASE_ADDR;
#define FLASH_NVRAM_BASE_ADDR ((Int32U)&NVRAM_BASE_ADDR)
EMCSTATICCNFG1 = 0x0081 | (1 << 19);
EMCSTATICWAITWEN1 = 2;
EMCSTATICWAITOEN1 = 0;
EMCSTATICWAITRD1 = 0x1f;
EMCSTATICWAITPG1 = 0;
EMCSTATICWAITWR1 = 0x1f;
EMCSTATICWAITTURN1 = 0x0f;
void LerFlash (void)
{
unsigned short i, id1, id2, id3, id4, id5, id6;
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) 0x00aa;
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x2aa) << 1))) 0x0055;
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) 0x0090;
id1 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0000) <<
1)));
id2 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0001) <<
1)));
id3 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000e) <<
1)));
id4 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000f) <<
1)));
id5 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0003) <<
1)));
id6 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0002) <<
1)));
}
2009/10/8, Michael J Scott
com>:
>
> FYI, The EMC appears to have a 256 byte read buffer. So if you were
> repeatable reading from the same location (or any location which is not
> more
> than 256 bytes away), the EMC reads from the internal buffer and does not
> actually read from the memory (at least on the static side) .That might be
> a
> problem for someone who wants to put something other than memory on the
> EMC.
>
> _____
>
> From: rolf_meeser [mailto:rolfm_9dq@yahoo.
de ]
> Sent: Thursday, October 08, 2009 11:29 AM
> To: lpc2000@yahoogroups .com
> Subject: [lpc2000] Re: EMC & Flash
>
> Hi Mike,
>
> The narrow WE pulses are the refresh cycles of you SDRAM. During write
> attempts to the flash WE should have been completely inactive.
> So it's working now for you?
>
> Regarding the manual, it does indeed have room for improvement...
>
> Rolf
>
> --- In lpc2000@yahoogroups
>
> .com, "Michael
> J Scott" wrote:
> >
> > Rolf,
> >
> >
> >
> > Thanks. The PB bit seemed to point to chips with individual byte
controls
> > (upper and lower) which my flash does not have. Interestingly the WE did
> > have a pulse on it without the PB bit being set; it was narrow but
> > definitely there. Setting the PB bit does make it more pronounced. Did
> NXP
> > publish any detailed information about the EMC, I find the explanations
> for
> > the different control registers very thin.
> >
> >
> >
> > Mike
> >
> >
> >
> > _____
> >
> > From: rolf_meeser [mailto:rolfm_9dq@...]
> > Sent: Thursday, October 08, 2009 9:12 AM
> > To: lpc2000@yahoogroups
>
> .com
> > Subject: [lpc2000] Re: EMC & Flash
> >
> >
> >
> >
> >
> > Hi Mike,
> >
> > --- In lpc2000@yahoogroups
>
> .com,
> > mjscott@ wrote:
> > > Static Init is:
> > >
> > > EMCStaticConfig0 = 0x1 | (1 << 19);
> > > EMCStaticWaitRd0 = 1f;
> > > EMCStaticWaitTurn0 = 0x0f;
> > > EMCStaticWaitWen0 = 2;
> > > EMCStaticWaitWr0 = 0x1f;
> > >
> >
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> > With this bit currently being cleared, you're lacking the write pulse at
> the
> > WE pin!
> >
> > Regards,
> > Rolf
> >
> >
> >
> >
> >
> >
> >
>
Reply by ●October 8, 20092009-10-08
I am having some problems to write in the flash memory, here is my code
void WriteFlash (void)
{
unsigned short i, Vetor2 [32] {3030,3131,3232,3333,2424,3535,3636,3737,3838,3939,4040,
3030,3131,3232,3333,3434,3535,3636,3737,3838,3939,4040,
3030,3131,3232,3333,3434,3535,3636,3737,3838,3939};
volatile UINT16 * dst = ( (UINT16 *)(0x81000000 + (((UINT16)0x0000) <<
1))); /* flash destination address */
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) 0x00aa; /* write unlock cycle 1 */
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x2aa) << 1))) 0x0055; /* write unlock cycle 2 */
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0000) << 1))) 0x0025; /* write write buffer load command */
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0000) << 1))) 0x0020;
for (i=0;i<1;i++)
{
*dst++ = Vetor2[i];
}
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0000) << 1))) 0x0029; /* write confirm command */
}
when I try to read the same block I get nothing, remenber that I can read
the Flash ID, so my read routine is working well.
2009/10/8, Michael J Scott :
>
> Thanks all. Changed the chip and everything is working correctly. The EMC
> read buffer is going to be an issue for checking status while programming
> or
> erasing, I have a plan though.
>
> Thanks again.
>
> Mike
>
> _____
>
> From: Alberto de Martini [mailto:a...@gmail.com]
>
> Sent: Thursday, October 08, 2009 1:45 PM
> To: l...
> Subject: Re: [lpc2000] Re: EMC & Flash
>
> Hi,
>
> Now I am able to read the product ID from external flash memory, I am using
> the CS1 and a spansion GL256P, A1...A23. Try to execute the code like that?
>
> extern Int32U NVRAM_BASE_ADDR;
> #define FLASH_NVRAM_BASE_ADDR ((Int32U)&NVRAM_BASE_ADDR)
>
> EMCSTATICCNFG1 = 0x0081 | (1 << 19);
> EMCSTATICWAITWEN1 = 2;
> EMCSTATICWAITOEN1 = 0;
> EMCSTATICWAITRD1 = 0x1f;
> EMCSTATICWAITPG1 = 0;
> EMCSTATICWAITWR1 = 0x1f;
> EMCSTATICWAITTURN1 = 0x0f;
>
> void LerFlash (void)
> {
> unsigned short i, id1, id2, id3, id4, id5, id6;
>
> *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) > 0x00aa;
> *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x2aa) << 1))) > 0x0055;
> *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) > 0x0090;
>
> id1 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0000) <<
> 1)));
> id2 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0001) <<
> 1)));
> id3 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000e) <<
> 1)));
> id4 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000f) <<
> 1)));
> id5 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0003) <<
> 1)));
> id6 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0002) <<
> 1)));
> }
>
> 2009/10/8, Michael J Scott
> >
> com>:
> >
> >
> >
> > FYI, The EMC appears to have a 256 byte read buffer. So if you were
> > repeatable reading from the same location (or any location which is not
> > more
> > than 256 bytes away), the EMC reads from the internal buffer and does not
> > actually read from the memory (at least on the static side) .That might
> be
> > a
> > problem for someone who wants to put something other than memory on the
> > EMC.
> >
> > _____
> >
> > From: rolf_meeser [mailto:rolfm_9dq@yahoo.
> >
> de ]
> > Sent: Thursday, October 08, 2009 11:29 AM
> > To: lpc2000@yahoogroups >
> .com
>
> > Subject: [lpc2000] Re: EMC & Flash
> >
> > Hi Mike,
> >
> > The narrow WE pulses are the refresh cycles of you SDRAM. During write
> > attempts to the flash WE should have been completely inactive.
> > So it's working now for you?
> >
> > Regarding the manual, it does indeed have room for improvement...
> >
> > Rolf
> >
> > --- In lpc2000@yahoogroups
> > 2540yahoogroups.com>>
> > .com, "Michael
> > J Scott" wrote:
> > >
> > > Rolf,
> > >
> > >
> > >
> > > Thanks. The PB bit seemed to point to chips with individual byte
> controls
> > > (upper and lower) which my flash does not have. Interestingly the WE
> did
> > > have a pulse on it without the PB bit being set; it was narrow but
> > > definitely there. Setting the PB bit does make it more pronounced. Did
> > NXP
> > > publish any detailed information about the EMC, I find the explanations
> > for
> > > the different control registers very thin.
> > >
> > >
> > >
> > > Mike
> > >
> > >
> > >
> > > _____
> > >
> > > From: rolf_meeser [mailto:rolfm_9dq@...]
> > > Sent: Thursday, October 08, 2009 9:12 AM
> > > To: lpc2000@yahoogroups
> > 2540yahoogroups.com>>
> > .com
> > > Subject: [lpc2000] Re: EMC & Flash
> > >
> > >
> > >
> > >
> > >
> > > Hi Mike,
> > >
> > > --- In lpc2000@yahoogroups
> > 2540yahoogroups.com>>
> > .com,
> > > mjscott@ wrote:
> > > > Static Init is:
> > > >
> > > > EMCStaticConfig0 = 0x1 | (1 << 19);
> > > > EMCStaticWaitRd0 = 1f;
> > > > EMCStaticWaitTurn0 = 0x0f;
> > > > EMCStaticWaitWen0 = 2;
> > > > EMCStaticWaitWr0 = 0x1f;
> > > >
> > >
> > > Try setting bit 7 (PB) in EMCStaticConfig0.
> > > With this bit currently being cleared, you're lacking the write pulse
> at
> > the
> > > WE pin!
> > >
> > > Regards,
> > > Rolf
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> >
> >
> >
> >
> >
>
>
>
>
>
void WriteFlash (void)
{
unsigned short i, Vetor2 [32] {3030,3131,3232,3333,2424,3535,3636,3737,3838,3939,4040,
3030,3131,3232,3333,3434,3535,3636,3737,3838,3939,4040,
3030,3131,3232,3333,3434,3535,3636,3737,3838,3939};
volatile UINT16 * dst = ( (UINT16 *)(0x81000000 + (((UINT16)0x0000) <<
1))); /* flash destination address */
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) 0x00aa; /* write unlock cycle 1 */
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x2aa) << 1))) 0x0055; /* write unlock cycle 2 */
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0000) << 1))) 0x0025; /* write write buffer load command */
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0000) << 1))) 0x0020;
for (i=0;i<1;i++)
{
*dst++ = Vetor2[i];
}
*( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0000) << 1))) 0x0029; /* write confirm command */
}
when I try to read the same block I get nothing, remenber that I can read
the Flash ID, so my read routine is working well.
2009/10/8, Michael J Scott :
>
> Thanks all. Changed the chip and everything is working correctly. The EMC
> read buffer is going to be an issue for checking status while programming
> or
> erasing, I have a plan though.
>
> Thanks again.
>
> Mike
>
> _____
>
> From: Alberto de Martini [mailto:a...@gmail.com]
>
> Sent: Thursday, October 08, 2009 1:45 PM
> To: l...
> Subject: Re: [lpc2000] Re: EMC & Flash
>
> Hi,
>
> Now I am able to read the product ID from external flash memory, I am using
> the CS1 and a spansion GL256P, A1...A23. Try to execute the code like that?
>
> extern Int32U NVRAM_BASE_ADDR;
> #define FLASH_NVRAM_BASE_ADDR ((Int32U)&NVRAM_BASE_ADDR)
>
> EMCSTATICCNFG1 = 0x0081 | (1 << 19);
> EMCSTATICWAITWEN1 = 2;
> EMCSTATICWAITOEN1 = 0;
> EMCSTATICWAITRD1 = 0x1f;
> EMCSTATICWAITPG1 = 0;
> EMCSTATICWAITWR1 = 0x1f;
> EMCSTATICWAITTURN1 = 0x0f;
>
> void LerFlash (void)
> {
> unsigned short i, id1, id2, id3, id4, id5, id6;
>
> *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) > 0x00aa;
> *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x2aa) << 1))) > 0x0055;
> *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) > 0x0090;
>
> id1 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0000) <<
> 1)));
> id2 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0001) <<
> 1)));
> id3 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000e) <<
> 1)));
> id4 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000f) <<
> 1)));
> id5 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0003) <<
> 1)));
> id6 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0002) <<
> 1)));
> }
>
> 2009/10/8, Michael J Scott
> >
> com>:
> >
> >
> >
> > FYI, The EMC appears to have a 256 byte read buffer. So if you were
> > repeatable reading from the same location (or any location which is not
> > more
> > than 256 bytes away), the EMC reads from the internal buffer and does not
> > actually read from the memory (at least on the static side) .That might
> be
> > a
> > problem for someone who wants to put something other than memory on the
> > EMC.
> >
> > _____
> >
> > From: rolf_meeser [mailto:rolfm_9dq@yahoo.
> >
> de ]
> > Sent: Thursday, October 08, 2009 11:29 AM
> > To: lpc2000@yahoogroups >
> .com
>
> > Subject: [lpc2000] Re: EMC & Flash
> >
> > Hi Mike,
> >
> > The narrow WE pulses are the refresh cycles of you SDRAM. During write
> > attempts to the flash WE should have been completely inactive.
> > So it's working now for you?
> >
> > Regarding the manual, it does indeed have room for improvement...
> >
> > Rolf
> >
> > --- In lpc2000@yahoogroups
> > 2540yahoogroups.com>>
> > .com, "Michael
> > J Scott" wrote:
> > >
> > > Rolf,
> > >
> > >
> > >
> > > Thanks. The PB bit seemed to point to chips with individual byte
> controls
> > > (upper and lower) which my flash does not have. Interestingly the WE
> did
> > > have a pulse on it without the PB bit being set; it was narrow but
> > > definitely there. Setting the PB bit does make it more pronounced. Did
> > NXP
> > > publish any detailed information about the EMC, I find the explanations
> > for
> > > the different control registers very thin.
> > >
> > >
> > >
> > > Mike
> > >
> > >
> > >
> > > _____
> > >
> > > From: rolf_meeser [mailto:rolfm_9dq@...]
> > > Sent: Thursday, October 08, 2009 9:12 AM
> > > To: lpc2000@yahoogroups
> > 2540yahoogroups.com>>
> > .com
> > > Subject: [lpc2000] Re: EMC & Flash
> > >
> > >
> > >
> > >
> > >
> > > Hi Mike,
> > >
> > > --- In lpc2000@yahoogroups
> > 2540yahoogroups.com>>
> > .com,
> > > mjscott@ wrote:
> > > > Static Init is:
> > > >
> > > > EMCStaticConfig0 = 0x1 | (1 << 19);
> > > > EMCStaticWaitRd0 = 1f;
> > > > EMCStaticWaitTurn0 = 0x0f;
> > > > EMCStaticWaitWen0 = 2;
> > > > EMCStaticWaitWr0 = 0x1f;
> > > >
> > >
> > > Try setting bit 7 (PB) in EMCStaticConfig0.
> > > With this bit currently being cleared, you're lacking the write pulse
> at
> > the
> > > WE pin!
> > >
> > > Regards,
> > > Rolf
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> >
> >
> >
> >
> >
>
>
>
>
>
