In one of our systems, I want to add a simple email feature. I have
email working on a wireless modem, but some of our customers want a
direct connection to their network. Some time ago, I put a footprint
for a ENC28J60 chip on our board, since the LPC2148 doesn't have
ethernet built in. I haven't been able to find stack code written for
the Keil compiler for this purpose. I saw that Keil had a Network
Suite. Is that a good way to go? I'm willing to pay for some
functionality, as it seems as this should be a simple feature to add. I
don't want to pay for all kinds of functionality that I don't need, but
for something reasonable, I'm all for it. Anyone have any ideas on
this? In the next couple of years, we are going to change to an ARM
with ethernet. So, that might make it easier. But, in the meantime, I
would like to get it working on the 2148. Any help or suggestions? Thanks.

Sutton

--
Sutton Mehaffey
Lookout Portable Security
4105 Royal Dr. #100
Kennesaw, GA 30144
800-207-6269, 770-514-7999, 770-514-1285 FAX
s...@lookoutportablesecurity.com



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Il 03/01/2014 02:35, Sutton Mehaffey ha scritto:
>
>
> In one of our systems, I want to add a simple email feature. I have
> email working on a wireless modem, but some of our customers want a
> direct connection to their network. Some time ago, I put a footprint
> for a ENC28J60 chip on our board, since the LPC2148 doesn't have
> ethernet built in. I haven't been able to find stack code written for
> the Keil compiler for this purpose.
>
Keil has TCP/IP implementation ready and you can find it in the
ARM\RL\TCPnet sub folder.
Of course you will need to write the driver for the ENC28J60 and put in
TCPnet\Drivers.
Also some adjustments in TCPnet\Config files may be needed.
If you have the Keil IDE and C compiler I think you have also the TCPnet
library so you shouldn't buy anything more.
>
> I saw that Keil had a Network
> Suite. Is that a good way to go?
>
Yes, I think so. Another possibility may be lwip there should be a port
to LPC2148 if I remember well.
>
> I'm willing to pay for some
> functionality, as it seems as this should be a simple feature to add. I
> don't want to pay for all kinds of functionality that I don't need, but
> for something reasonable, I'm all for it. Anyone have any ideas on
> this? In the next couple of years, we are going to change to an ARM
> with ethernet. So, that might make it easier. But, in the meantime, I
> would like to get it working on the 2148. Any help or suggestions? Thanks.
>
Both TCPnet and lwip are ported to NXP Cortex line of microcontrollers.
If you need to plan for longer time I think you should check
www.lpcware.com and see the status of LPCOpen Software Development Platform.
> Sutton
>
> --
> Sutton Mehaffey
> Lookout Portable Security
> 4105 Royal Dr. #100
> Kennesaw, GA 30144
> 800-207-6269, 770-514-7999, 770-514-1285 FAX
> s...@lookoutportablesecurity.com
>
>
>
>
>
> Questa e-mail priva di virus e malware perchattiva la protezione
> avast! Antivirus .

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Hi folks
I am trying to get the Helix mp3 decoder library running on an LPC1765.
The NXP port of the decoder provides an assembler file asmpoly_gcc.s to do the time-critical stuff. However this contains ARM (non-thumb) instructions such as SMLAL and when I call the assembly routine I drop into the hardfault handler. (this happens on the bx pc instruction which is supposed to swap the registers)

They show the library running on an LPC1768... but I am confused, I thought the Cortex M3 only allowed Thumb instructions ... is it possible to run full ARM instructions on it?
--
Tim Mitchell


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Hi Tim,

> Hi folks
> I am trying to get the Helix mp3 decoder library running on an LPC1765.
> The NXP port of the decoder provides an assembler file asmpoly_gcc.s to do
> the time-critical stuff. However this contains ARM (non-thumb)
> instructions such as SMLAL and when I call the assembly routine I drop
> into the hardfault handler. (this happens on the bx pc instruction which
> is supposed to swap the registers)
>
> They show the library running on an LPC1768... but I am confused, I
> thought the Cortex M3 only allowed Thumb instructions ... is it possible
> to run full ARM instructions on it?

Cortex-M3 runs the full Thumb-2 instruction set; this includes 16-bit Thumb
instructions that you'd find on things like the LPC2000 in Thumb mode and
Cortex-M0, and also Thumb-2 instructions that are 32-bits wide. Many ARM
instructions have a direct Thumb or Thumb-2 equivalent, but not all. This
is why ARM introduced "unified syntax" where you can write a Thumb or
Thumb-2 instruction in source code and have the assembler convert it to
whatever is required in ARM, Thumb, or Thumb-2 encoding. If it can't then
you get an error.

In your case, SMLAL is a signed multiply-accumulate and is described as a
Thumb-2 instruction here:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0489c/Cihbjeh
g.html

Regards,

--
Paul Curtis, Rowley Associates Ltd http://www.rowley.co.uk
SolderCore Development Platform http://www.soldercore.com



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Paul Curtis wrote:
> Hi Tim,
>> Hi folks
>> I am trying to get the Helix mp3 decoder library running on an
>> LPC1765. The NXP port of the decoder provides an assembler file
>> asmpoly_gcc.s to do the time-critical stuff. However this contains
>> ARM (non-thumb) instructions such as SMLAL and when I call the
>> assembly routine I drop into the hardfault handler. (this happens on
>> the bx pc instruction which is supposed to swap the registers)
>>
>> They show the library running on an LPC1768... but I am confused, I
>> thought the Cortex M3 only allowed Thumb instructions ... is it
>> possible to run full ARM instructions on it?
>
> Cortex-M3 runs the full Thumb-2 instruction set; this includes 16-bit
> Thumb instructions that you'd find on things like the LPC2000 in
> Thumb mode and Cortex-M0, and also Thumb-2 instructions that are
> 32-bits wide. Many ARM instructions have a direct Thumb or Thumb-2
> equivalent, but not all. This is why ARM introduced "unified syntax"
> where you can write a Thumb or Thumb-2 instruction in source code and
> have the assembler convert it to whatever is required in ARM, Thumb,
> or Thumb-2 encoding. If it can't then you get an error.
>
> In your case, SMLAL is a signed multiply-accumulate and is described
> as a Thumb-2 instruction here:

Thanks for the informative reply Paul... so my problem must lie elsewhere.
I have enabled interworking, (otherwise it won't compile) and I can see the thumb/arm switching code which aligns the instructions.

So why would I go into hardfault when executing the bx pc instruction in the thumb/arm switching?

--
Tim Mitchell
Sabre Technology (Hull) Ltd
http://www.sabretechnology.co.uk
t:01482 800981 f:01482 801078



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Hi Tim,

> >> I am trying to get the Helix mp3 decoder library running on an
> >> LPC1765. The NXP port of the decoder provides an assembler file
> >> asmpoly_gcc.s to do the time-critical stuff. However this contains
> >> ARM (non-thumb) instructions such as SMLAL and when I call the
> >> assembly routine I drop into the hardfault handler. (this happens on
> >> the bx pc instruction which is supposed to swap the registers)
> >>
> >> They show the library running on an LPC1768... but I am confused, I
> >> thought the Cortex M3 only allowed Thumb instructions ... is it
> >> possible to run full ARM instructions on it?
> >
> > Cortex-M3 runs the full Thumb-2 instruction set; this includes 16-bit
> > Thumb instructions that you'd find on things like the LPC2000 in Thumb
> > mode and Cortex-M0, and also Thumb-2 instructions that are 32-bits
> > wide. Many ARM instructions have a direct Thumb or Thumb-2
> > equivalent, but not all. This is why ARM introduced "unified syntax"
> > where you can write a Thumb or Thumb-2 instruction in source code and
> > have the assembler convert it to whatever is required in ARM, Thumb,
> > or Thumb-2 encoding. If it can't then you get an error.
> >
> > In your case, SMLAL is a signed multiply-accumulate and is described
> > as a Thumb-2 instruction here:
>
>
> Thanks for the informative reply Paul... so my problem must lie elsewhere.
> I have enabled interworking, (otherwise it won't compile) and I can see
> the thumb/arm switching code which aligns the instructions.

There is no ARM MODE on an LPC1700... The processor is always in Thumb
mode.

> So why would I go into hardfault when executing the bx pc instruction in
> the thumb/arm switching?

This should never happen; bx pc is not required on Thumb-2 processors (I
believe) because no ARM-Thumb switch is ever required.

--
Paul Curtis, Rowley Associates Ltd http://www.rowley.co.uk
SolderCore Development Platform http://www.soldercore.com



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> Thanks for the informative reply Paul... so my problem must lie elsewhere.

> I have enabled interworking, (otherwise it won't compile) and I can

> see the thumb/arm switching code which aligns the instructions.

>

> So why would I go into hardfault when executing the bx pc instruction

> in the thumb/arm switching?

>

You don't want it to switch from Thumb to ARM. The Cortex-M3 always runs in Thumb state. The LSB value of the BX target register must be 1. If you are calling a function you should probably be using BLX anyway.

Regards,

Chris Burrows

CFB Software

http://www.astrobe.com http://www.astrobe.com/ Start a New Thread

c...@internode.on.net wrote:
>> So why would I go into hardfault when executing the bx pc instruction
>> in the thumb/arm switching?
>
> You don't want it to switch from Thumb to ARM. The Cortex-M3 always
> runs in Thumb state. The LSB value of the BX target register must be
> 1. If you are calling a function you should probably be using BLX
> anyway.
>

The compiler is generating all this, I'm just looking at the disassembly to track down where the hardfault is occurring.

--
Tim Mitchell


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Am 03.01.2014 14:09, schrieb Tim Mitchell:
> c...@internode.on.net wrote:
>>> So why would I go into hardfault when executing the bx pc instruction
>>> in the thumb/arm switching?
>>
>> You don't want it to switch from Thumb to ARM. The Cortex-M3 always
>> runs in Thumb state. The LSB value of the BX target register must be
>> 1. If you are calling a function you should probably be using BLX
>> anyway.
>> The compiler is generating all this, I'm just looking at the disassembly to track down where the hardfault is occurring.

So, tell the compiler to generate code for Cortex-M3 (no interworking),
then port the assembly to thumb-2.
Then you're done.

--
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+
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Tim,

> c...@internode.on.net wrote:
> >> So why would I go into hardfault when executing the bx pc instruction
> >> in the thumb/arm switching?
> >
> > You don't want it to switch from Thumb to ARM. The Cortex-M3 always
> > runs in Thumb state. The LSB value of the BX target register must be
> > 1. If you are calling a function you should probably be using BLX
> > anyway.
> >
>
> The compiler is generating all this, I'm just looking at the disassembly
> to track down where the hardfault is occurring.

...you do not need interworking, there is nothing to "interwork" with. If
you are using CrossWorks, leave the "Interworking" at "Default" on your
project and it'll be disabled for Cortex-M3 builds.

Regards,

--
Paul Curtis, Rowley Associates Ltd http://www.rowley.co.uk
SolderCore Development Platform http://www.soldercore.com



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