> Descriptions / snippets of sample code for each of the crystal
> combinations. Please make additions / corrections.
> Draft #2 ... 8 Jul 02
>
> ----
> Crystal freq ranges:
> Low freq crystal: 32.768 Khz ... min / max ???
> High freq crystal: 1 Mhz - 8 Mhz.
>
> Nice feature:
> Use the low freq crystal during sleep time to minimize power
> consumption.
> When awake, use the DCO (or high freq crystal) to perform fast
> computations
> then go back to sleep.
>
> For power consumption reasons, it is important to turn off the high freq
>
> crystal when sleeping. Note that the osc needs time to get up and
> running
> each time it is re-started.
>
> Setup prior to selecting crystals:
> WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
> //Next two instructions give ability to watch the clocks on a scope
> P5DIR = 0xFF; //Set P5 to output direction
> P5SEL = 0xFF; //Set P5 to output MCLK, ACLK, etc.
>
> Case 1: No crystals ... use DCO
> Advantage: No external parts.
> Lower power consumption than high freq crystal.
> Disadvantage: Freq may vary.
> Higher power consumption than low freq crystal.
>
> Default condition after power up ... around 750 Khz
>
> Case 2: One low freq crystal on Xin
> Advantage: Lowest power consumption.
> Disadvantages: The startup of ACLK is very slow ... up to 1 second.
> Can be slow to "lock" the DCO to ACLK.
>
> BCSCTL1 &= ~XTS; //Set Xin to low freq
> do
> {
> IFG1 &= ~OFIFG; //Clear OSCFault flag
> for (i = 0xFF; i > 0; i--); //Time for flag to set
> }
> while (IFG1 & OFIFG); //OSCFault flag still set?
>
> IFG1 &= ~OFIFG; //Clear osc. fault int. flag
> BCSCTL2 |= SELM_3; //Set MCLK to use Xin
>
> Note: The above listing may work only with the new F4xx series.
> There is no fault detection for the low freq osc. The
> solution for this is ???????????????
>
> Case 3: One high freq crystal on Xin
> Advantage: Faster computations ... same as Case 4
> Disadvantage: Higher power consumption ... increases with freq.
>
> BCSCTL1 |= XTS; //Set Xin to high freq
> do
> {
> IFG1 &= ~OFIFG; //Clear OSCFault flag
> for (i = 0xFF; i > 0; i--); //Time for flag to set
> }
> while (IFG1 & OFIFG); //OSCFault flag still set?
>
> IFG1 &= ~OFIFG; //Clear osc. fault int. flag
> BCSCTL2 |= SELM_3; //Set MCLK to use Xin
>
> Case 4: One high freq crystal on Xt2in
> Advantage: Faster computations ... same as Case 3
> Disadvantage: Higher power consumption ... increases with freq.
> No Aux Clock
>
> BCSCTL1 &= ~XT2OFF; //Set Xt2in on
> do
> {
> IFG1 &= ~OFIFG; //Clear OSCFault flag
> for (i = 0xFF; i > 0; i--); //Time for flag to set
> }
> while (IFG1 & OFIFG); //OSCFault flag still set?
>
> IFG1 &= ~OFIFG; //Clear osc. fault int. flag
> BCSCTL2 |= SELM_2; //Set MCLK to use XT2
>
> Case 5: One low freq crystal on Xin and one high freq crystal on Xt2in
> Advantage: Can run very low power when sleeping and very fast
> computations when awake.
> Disadvantage: Need two crystals.
>
> BCSCTL1 &= ~XTS; //Set Xin to low freq
> BCSCTL1 &= ~XT2OFF; //Set Xt2in on
> do
> {
> IFG1 &= ~OFIFG; //Clear OSCFault flag
> for (i = 0xFF; i > 0; i--); //Time for flag to set
> }
> while (IFG1 & OFIFG); //OSCFault flag still set?
>
> IFG1 &= ~OFIFG; //Clear osc. fault int. flag
> BCSCTL2 |= SELM_3; //Set MCLK to use Xin
> ...
> BCSCTL2 |= SELM_2; //Set MCLK to use Xt2in
> ...
> BCSCTL2 |= SELM_3; //Set MCLK to use Xin
> ----
>
> Question 1: What are the max / min values for a low freq crystal?
> Question 2: Regarding Kris De Vos' comment,
> BCSCTL1 |= XTS; //Set Xin to high freq
> ......
> do (IFG1 &= ~OFIFG)
> while (IFG1 & OFIFG); //Wait until oscillator has stabilized
> IFG1 &= ~OFIFG; //Clear the oscillator fault flag
> ---> At this moment I would also insert a delay as appropriate to
fully
> stabilise LXFTAL1 and / or XT2 ............. (again, it d_e_p_e_n_d_s )
> BCSCTL2 |= SELM_3; //Set MCLK to use Xin
> It is not clear why the delay is needed. At startup, we are running off
> of the DCO which will quite likely vary in freq. Or is the concern that
> the crystal is not up and running fully yet?
> Question 3: Regarding Kris De Vos' comment, "You can do really
nice
> things like wake up XT2 and let's say during the eg. 5 mS needed to
> stabilise XT2, you can clock on the DCO and concurrently do CPU crunching
> like CRC calculations, or other SW intensive stuff with the DCO at highest
> speed. That's one of the many beauties of MSP430........." If I
> understand this correctly, it is possible to instantaneously switch to the
> DCO without any delay (as is necessary with the crystals)?
> Question 4: Regarding TI's comment, " With the "new"
F4xx series and the
> low-power oscillator the fault detection should work with the LF osc. and
> 32kHz. For all other devices there is no fault detection for the LF
> oscillator (only for the HF osc.). " What is the proposed solution?
>
> Clyde Eisenbeis
>
MCLK output
Started by ●June 28, 2002
Reply by ●July 8, 20022002-07-08
Reply by ●July 8, 20022002-07-08
Oops! Sorry about the previous messages. _This_ email should be an
editable Rich Text version.
----------------------------------
Descriptions / snippets of sample code for each of the crystal combinations.
Please make additions / corrections.
Draft #2 ... 8 Jul 02
----
Crystal freq ranges:
Low freq crystal: 32.768 Khz ... min / max ???
High freq crystal: 1 Mhz - 8 Mhz.
Nice feature:
Use the low freq crystal during sleep time to minimize power consumption.
When awake, use the DCO (or high freq crystal) to perform fast
computations
then go back to sleep.
For power consumption reasons, it is important to turn off the high freq
crystal when sleeping. Note that the osc needs time to get up and
running
each time it is re-started.
Setup prior to selecting crystals:
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
//Next two instructions give ability to watch the clocks on a scope
P5DIR = 0xFF; //Set P5 to output direction
P5SEL = 0xFF; //Set P5 to output MCLK, ACLK, etc.
Case 1: No crystals ... use DCO
Advantage: No external parts.
Lower power consumption than high freq crystal.
Disadvantage: Freq may vary.
Higher power consumption than low freq crystal.
Default condition after power up ... around 750 Khz
Case 2: One low freq crystal on Xin
Advantage: Lowest power consumption.
Disadvantages: The startup of ACLK is very slow ... up to 1 second.
Can be slow to "lock" the DCO to ACLK.
BCSCTL1 &= ~XTS; //Set Xin to low freq
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
Note: The above listing may work only with the new F4xx series.
There is no fault detection for the low freq osc. The
solution for this is ???????????????
Case 3: One high freq crystal on Xin
Advantage: Faster computations ... same as Case 4
Disadvantage: Higher power consumption ... increases with freq.
BCSCTL1 |= XTS; //Set Xin to high freq
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
Case 4: One high freq crystal on Xt2in
Advantage: Faster computations ... same as Case 3
Disadvantage: Higher power consumption ... increases with freq.
No Aux Clock
BCSCTL1 &= ~XT2OFF; //Set Xt2in on
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_2; //Set MCLK to use XT2
Case 5: One low freq crystal on Xin and one high freq crystal on Xt2in
Advantage: Can run very low power when sleeping and very fast computations
when awake.
Disadvantage: Need two crystals.
BCSCTL1 &= ~XTS; //Set Xin to low freq
BCSCTL1 &= ~XT2OFF; //Set Xt2in on
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
...
BCSCTL2 |= SELM_2; //Set MCLK to use Xt2in
...
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
----
Question 1: What are the max / min values for a low freq crystal?
Question 2: Regarding Kris De Vos' comment,
BCSCTL1 |= XTS; //Set Xin to high freq
......
do (IFG1 &= ~OFIFG)
while (IFG1 & OFIFG); //Wait until oscillator has stabilized
IFG1 &= ~OFIFG; //Clear the oscillator fault flag
---> At this moment I would also insert a delay as appropriate to fully
stabilise LXFTAL1 and / or XT2 ............. (again, it d_e_p_e_n_d_s )
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
It is not clear why the delay is needed. At startup, we are running off of
the DCO which will quite likely vary in freq. Or is the concern that the
crystal is not up and running fully yet?
Question 3: Regarding Kris De Vos' comment, "You can do really nice
things
like wake up XT2 and let's say during the eg. 5 mS needed to stabilise XT2,
you can clock on the DCO and concurrently do CPU crunching like CRC
calculations, or other SW intensive stuff with the DCO at highest speed.
That's one of the many beauties of MSP430........." If I understand
this
correctly, it is possible to instantaneously switch to the DCO without any
delay (as is necessary with the crystals)?
Question 4: Regarding TI's comment, " With the "new" F4xx
series and the
low-power oscillator the fault detection should work with the LF osc. and
32kHz. For all other devices there is no fault detection for the LF
oscillator (only for the HF osc.). " What is the proposed solution?
Clyde Eisenbeis
Reply by ●July 8, 20022002-07-08
What a mess. One more time ... I guess I need to do this
in html. My apologies.
----------------------------------
----------------------------------
Descriptions / snippets
of sample code for each of the crystal combinations. Please make additions /
corrections.
Draft #2 ... 8 Jul 02
Draft #2 ... 8 Jul 02
----
Crystal freq ranges:
Low freq crystal: 32.768 Khz ... min / max ???
High freq crystal: 1 Mhz - 8 Mhz.
Crystal freq ranges:
Low freq crystal: 32.768 Khz ... min / max ???
High freq crystal: 1 Mhz - 8 Mhz.
Nice feature:
Use the low freq crystal during sleep time to minimize power consumption.
When awake, use the DCO (or high freq crystal) to perform fast computations
then go back to sleep.
Use the low freq crystal during sleep time to minimize power consumption.
When awake, use the DCO (or high freq crystal) to perform fast computations
then go back to sleep.
For power consumption reasons,
it is important to turn off the high freq
crystal when sleeping. Note that the osc needs time to get up and running
each time it is re-started.
crystal when sleeping. Note that the osc needs time to get up and running
each time it is re-started.
Setup prior to selecting
crystals:
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
//Next two instructions give ability to watch the clocks on a scope
P5DIR = 0xFF; //Set P5 to output direction
P5SEL = 0xFF; //Set P5 to output MCLK, ACLK, etc.
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
//Next two instructions give ability to watch the clocks on a scope
P5DIR = 0xFF; //Set P5 to output direction
P5SEL = 0xFF; //Set P5 to output MCLK, ACLK, etc.
Case 1: No crystals ... use
DCO
Advantage: No external parts.
Lower power consumption than high freq crystal.
Disadvantage: Freq may vary.
Higher power consumption than low freq crystal.
Advantage: No external parts.
Lower power consumption than high freq crystal.
Disadvantage: Freq may vary.
Higher power consumption than low freq crystal.
Default condition after power
up ... around 750 Khz
Case 2: One low freq crystal
on Xin
Advantage: Lowest power consumption.
Disadvantages: The startup of ACLK is very slow ... up to 1 second.
Can be slow to "lock" the DCO to ACLK.
Advantage: Lowest power consumption.
Disadvantages: The startup of ACLK is very slow ... up to 1 second.
Can be slow to "lock" the DCO to ACLK.
BCSCTL1 &=
~XTS;
//Set Xin to low freq
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
Note: The above listing may
work only with the new F4xx series.
There is no fault detection for the low freq osc. The
solution for this is ???????????????
There is no fault detection for the low freq osc. The
solution for this is ???????????????
Case 3: One high freq crystal
on Xin
Advantage: Faster computations ... same as Case 4
Disadvantage: Higher power consumption ... increases with freq.
Advantage: Faster computations ... same as Case 4
Disadvantage: Higher power consumption ... increases with freq.
BCSCTL1 |=
XTS;
//Set Xin to high freq
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
Case 4: One high freq crystal
on Xt2in
Advantage: Faster computations ... same as Case 3
Disadvantage: Higher power consumption ... increases with freq.
No Aux Clock
Advantage: Faster computations ... same as Case 3
Disadvantage: Higher power consumption ... increases with freq.
No Aux Clock
BCSCTL1 &=
~XT2OFF;
//Set Xt2in on
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_2; //Set MCLK to use XT2
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_2; //Set MCLK to use XT2
Case 5: One low freq crystal
on Xin and one high freq crystal on Xt2in
Advantage: Can run very low power when sleeping and very fast computations when awake.
Disadvantage: Need two crystals.
Advantage: Can run very low power when sleeping and very fast computations when awake.
Disadvantage: Need two crystals.
BCSCTL1 &=
~XTS;
//Set Xin to low freq
BCSCTL1 &= ~XT2OFF; //Set Xt2in on
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
...
BCSCTL2 |= SELM_2; //Set MCLK to use Xt2in
...
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
----
Question 1: What are the max / min values for a low freq crystal?
BCSCTL1 &= ~XT2OFF; //Set Xt2in on
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
...
BCSCTL2 |= SELM_2; //Set MCLK to use Xt2in
...
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
----
Question 1: What are the max / min values for a low freq crystal?
Question 2: Regarding Kris De Vos' comment,
BCSCTL1 |= XTS; //Set
Xin to high freq
......
do (IFG1 &= ~OFIFG)
while (IFG1 & OFIFG); //Wait until oscillator has stabilized
IFG1 &= ~OFIFG; //Clear the oscillator fault flag
---> At this moment I would also insert a delay as appropriate to fully stabilise LXFTAL1 and / or XT2 ............. (again, it d_e_p_e_n_d_s )
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
......
do (IFG1 &= ~OFIFG)
while (IFG1 & OFIFG); //Wait until oscillator has stabilized
IFG1 &= ~OFIFG; //Clear the oscillator fault flag
---> At this moment I would also insert a delay as appropriate to fully stabilise LXFTAL1 and / or XT2 ............. (again, it d_e_p_e_n_d_s )
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
It is not clear why the delay is needed. At startup, we are running
off of the DCO which will quite likely vary in freq. Or is the concern
that the crystal is not up and running fully yet?
Question 3: Regarding Kris De Vos' comment,
"You can do really nice things like wake up XT2 and
let's say during the eg. 5 mS needed to stabilise XT2, you can clock on the
DCO and concurrently do CPU crunching like CRC calculations, or other SW
intensive stuff with the DCO at highest speed. That's one of the many
beauties of MSP430........." If I understand this correctly, it is
possible to instantaneously switch to the DCO without any delay (as is necessary
with the crystals)?
Question 4: Regarding TI's comment, " With the "new" F4xx series and the low-power oscillator the
fault detection should work with the LF osc. and 32kHz. For all other devices
there is no fault detection for the LF oscillator (only for the HF osc.).
" What is the proposed solution?
Clyde
Eisenbeis
Reply by ●July 8, 20022002-07-08
Hi Clyde,
It's been a long day (and night, it's 5 AM here and I've
been going since "yesterday"
morning.
A brief interim reply , then I'm off for a rest....... more to
follow......
Question 3: Regarding Kris De Vos'
comment, "You can do really nice things
like wake up XT2 and let's say during the eg. 5 mS needed to stabilise XT2,
you can clock on the DCO and concurrently do CPU crunching like CRC
calculations, or other SW intensive stuff with the DCO at highest speed.
That's one of the many beauties of MSP430........." If I understand this
correctly, it is possible to instantaneously switch to the DCO without any
delay (as is necessary with the crystals)?
like wake up XT2 and let's say during the eg. 5 mS needed to stabilise XT2,
you can clock on the DCO and concurrently do CPU crunching like CRC
calculations, or other SW intensive stuff with the DCO at highest speed.
That's one of the many beauties of MSP430........." If I understand this
correctly, it is possible to instantaneously switch to the DCO without any
delay (as is necessary with the crystals)?
Yes.
The DCO start up is spec'd as 6 uS (worst case).
If you are for example in LPM 3 or 4, an INT will be instantly serviced by
the DCO.
That's one of the beauties of MSP430.
(INTs are, unless there is IV offset, 6 cycles IN, 5 cycles OUT)
Unlike other MCUs, when you run low power and you're in "sleep", to
service a wake up
event you need to fire up the clock.
Basically your MCU sits there for several mS chewing current doing
nothing.
With MSP430, an INT results in the PC (return address) being pushed on the
stack, followed
by the Status register - which holds the state of LPM0/1/2/3/4.
If your MCU is completely asleep, the INT uses a different Status
register setting (typically where
the DCO is clocking).
Say your INT only needs 10 uS.
~ 15 uS later the CPU "pops" the SR and PC, so it returns to the callee,
and re-enters the LPM it was in
before the interrupt (even if it was LPM4) all in a matter of uS..... (Does
it get any better for micropower ?)
(BTW : Note that without an external DCO current resistor, the max. DCO
speed is typ.
~ 4.5-4.8 MHz @ 3.3 Volts @ 25 degree Celsius, but there is process
variation.
If you want 8 MHz, you need Dcor - look it up)
Have a look at most MCUs, say they might spec 10 mA active.
Then they spec "idle" (clock stopped), it typically still uses 4-5 mA
!!!!!!!!!!!
When we talk "higher current", we're still on "the smell of an oily
rag"
At 8 MHz 16 bit CPU crunching still is a mere ~ 2.5 mA @ 3 Volts
!!!!!!!!!
And this is in Flash !!!!!!!!
(Flash has a much higher gate ins capacitance, so when you clock it, it
sucks much more current)
Quite a few companies have attempted to try get near TI's MSP430 Flash
power usage, but none have
ever suceeded.
The closest I consider to be Cygnal (whom however have a fantastic Flash
protection scheme, TI should take
a look at it)
Finally, AVR - which already is a damn fast MCU is also Flash.
I've had apps where MSP430 (floating point intensive) runs 4 times
faster than AVR and at 1/4th the current !!!!!!!!!!!!!!!!!
It makes 68XXX look like dinosaurs current wise.
I've written a full BASIC on-line interpreter in C on MSP430 (with
high level RF networking into it),
and a mate tested it and found it runs faster than the old XT, clocked at
10 MHz with a V20 in GWBASIC !!!
(The F149 is using 2.4 mA !!!!!!)
Hats off to TI !
----- Original Message -----From: Eisenbeis, Clyde [FRCO/MTN]To: 'msp430@yahoogroups.com'Sent: Tuesday, July 09, 2002 4:47 AMSubject: Re: [msp430] Re: MCLK outputOops! Sorry about the previous messages. _This_ email should be an
editable Rich Text version.
----------------------------------
Descriptions / snippets of sample code for each of the crystal combinations.
Please make additions / corrections.
Draft #2 ... 8 Jul 02
----
Crystal freq ranges:
Low freq crystal: 32.768 Khz ... min / max ???
High freq crystal: 1 Mhz - 8 Mhz.
Nice feature:
Use the low freq crystal during sleep time to minimize power consumption.
When awake, use the DCO (or high freq crystal) to perform fast
computations
then go back to sleep.
For power consumption reasons, it is important to turn off the high freq
crystal when sleeping. Note that the osc needs time to get up and
running
each time it is re-started.
Setup prior to selecting crystals:
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
//Next two instructions give ability to watch the clocks on a scope
P5DIR = 0xFF; //Set P5 to output direction
P5SEL = 0xFF; //Set P5 to output MCLK, ACLK, etc.
Case 1: No crystals ... use DCO
Advantage: No external parts.
Lower power consumption than high freq crystal.
Disadvantage: Freq may vary.
Higher power consumption than low freq crystal.
Default condition after power up ... around 750 Khz
Case 2: One low freq crystal on Xin
Advantage: Lowest power consumption.
Disadvantages: The startup of ACLK is very slow ... up to 1 second.
Can be slow to "lock" the DCO to ACLK.
BCSCTL1 &= ~XTS; //Set Xin to low freq
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
Note: The above listing may work only with the new F4xx series.
There is no fault detection for the low freq osc. The
solution for this is ???????????????
Case 3: One high freq crystal on Xin
Advantage: Faster computations ... same as Case 4
Disadvantage: Higher power consumption ... increases with freq.
BCSCTL1 |= XTS; //Set Xin to high freq
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
Case 4: One high freq crystal on Xt2in
Advantage: Faster computations ... same as Case 3
Disadvantage: Higher power consumption ... increases with freq.
No Aux Clock
BCSCTL1 &= ~XT2OFF; //Set Xt2in on
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_2; //Set MCLK to use XT2
Case 5: One low freq crystal on Xin and one high freq crystal on Xt2in
Advantage: Can run very low power when sleeping and very fast computations
when awake.
Disadvantage: Need two crystals.
BCSCTL1 &= ~XTS; //Set Xin to low freq
BCSCTL1 &= ~XT2OFF; //Set Xt2in on
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
...
BCSCTL2 |= SELM_2; //Set MCLK to use Xt2in
...
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
----
Question 1: What are the max / min values for a low freq crystal?
Question 2: Regarding Kris De Vos' comment,
BCSCTL1 |= XTS; //Set Xin to high freq
......
do (IFG1 &= ~OFIFG)
while (IFG1 & OFIFG); //Wait until oscillator has stabilized
IFG1 &= ~OFIFG; //Clear the oscillator fault flag
---> At this moment I would also insert a delay as appropriate to fully
stabilise LXFTAL1 and / or XT2 ............. (again, it d_e_p_e_n_d_s )
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
It is not clear why the delay is needed. At startup, we are running off of
the DCO which will quite likely vary in freq. Or is the concern that the
crystal is not up and running fully yet?
Question 3: Regarding Kris De Vos' comment, "You can do really nice things
like wake up XT2 and let's say during the eg. 5 mS needed to stabilise XT2,
you can clock on the DCO and concurrently do CPU crunching like CRC
calculations, or other SW intensive stuff with the DCO at highest speed.
That's one of the many beauties of MSP430........." If I understand this
correctly, it is possible to instantaneously switch to the DCO without any
delay (as is necessary with the crystals)?
Question 4: Regarding TI's comment, " With the "new" F4xx series and the
low-power oscillator the fault detection should work with the LF osc. and
32kHz. For all other devices there is no fault detection for the LF
oscillator (only for the HF osc.). " What is the proposed solution?
Clyde Eisenbeis
">Yahoo! Terms of Service.
Reply by ●July 8, 20022002-07-08
Hi Clyde
One quick last comment about the DCO and say LPM 3/4.
When the MSP430 is in LMP3 or 4 for example, and an INT is quickly
serviced by the DCO, you are free to access the status of LPM on the
stack(frame)
from within the INT, so you can return from the INT and continue in a
different LPM
than you were before the INT.
(I would have to give more specifc examples, which I can't really do
right now, but
it expands the MSP430's ultra low power capabilities even
further)
As time goes by, you will discover more and more how incredibly brilliant
the MSP430 is
for ultra- ultra low power.
Gosh, even if you're not as concerned about micropower, you can start
doing some quite decent
DSP with its MAC for FIR, IIR, FFT algos etc.
I've done design jobs in the last 2 years no other MCU possibly could
have allowed me to do, believe me.
Kris
Reply by ●July 11, 20022002-07-11
Draft
# 3, Descriptions / snippets of
sample code for each of the crystal combinations. Please make additions /
corrections.
11 Jul 02
11 Jul 02
----
References:
-Msp430x1xx Family User's Guide (slau049b)
References:
-Msp430x1xx Family User's Guide (slau049b)
-Msp430x1xx Basic Clock System
(slaa081)
-Msp430x13x, Msp430x140x Data
Sheet
-Kris De Vos
Oscillator details :
-Low freq crystal: 32.768 Khz ... min / max ???
-High freq crystal: 455 Khz - 8 Mhz.
-Low freq crystal: 32.768 Khz ... min / max ???
-High freq crystal: 455 Khz - 8 Mhz.
-DCO: internal resistor, default: 750 Khz
(approximately)
-DCO: internal resistor, change RSEL in BCSCTL1: 120 Khz to 4.9
Mhz (data sheet, p46)
-32.768 Khz crystal requires no external caps
(slaa081, p3)-Other crystals require caps (slaa081, p14)
Nice
features:
-Use the low freq crystal during sleep time to minimize power consumption. When awake, use the DCO (or high freq crystal) to perform fast computations then go back to sleep.
-Use the low freq crystal during sleep time to minimize power consumption. When awake, use the DCO (or high freq crystal) to perform fast computations then go back to sleep.
-For power
consumption reasons, it is important to turn off the high freq crystal
when sleeping. Note that the osc needs time to get up and
running each time it is re-started.
-It is ok to instantaneously switch to the DCO without any
delay (as is necessary with the crystals). The DCO start up is spec'd as 6
uS (worst case).
-In LPM 3 or 4, an INT will
be instantly serviced by the DCO. An INT results in the PC (return address)
being pushed on the stack, followed by the Status register - which holds the
state of LPM0/1/2/3/4.
Setup prior to selecting
crystals:
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
//Next two instructions give ability to watch the clocks on a scope
P5DIR = 0xFF; //Set P5 to output direction
P5SEL = 0xFF; //Set P5 to output MCLK, ACLK, etc.
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
//Next two instructions give ability to watch the clocks on a scope
P5DIR = 0xFF; //Set P5 to output direction
P5SEL = 0xFF; //Set P5 to output MCLK, ACLK, etc.
Case 1: No crystals ...
use DCO
Advantage: No external parts.
Lower power consumption than high freq crystal.
Disadvantage: Freq may vary.
Higher power consumption than low freq crystal.
Advantage: No external parts.
Lower power consumption than high freq crystal.
Disadvantage: Freq may vary.
Higher power consumption than low freq crystal.
Default condition after power
up ... around 750 Khz
Case 2: One low freq
crystal on Xin
Advantage: Lowest power consumption.
Disadvantages: The startup of ACLK is very slow ... up to 1 second.
Can be slow to "lock" the DCO to ACLK.
Advantage: Lowest power consumption.
Disadvantages: The startup of ACLK is very slow ... up to 1 second.
Can be slow to "lock" the DCO to ACLK.
BCSCTL1 &=
~XTS;
//Set Xin to low freq
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
Note: The above listing may
work only with the new F4xx series.
There is no fault detection for the low freq osc. The
solution for this is ???????????????
There is no fault detection for the low freq osc. The
solution for this is ???????????????
Case 3: One high freq crystal
on Xin
Advantage: Faster computations ... same as Case 4
Disadvantage: Higher power consumption ... increases with freq.
Advantage: Faster computations ... same as Case 4
Disadvantage: Higher power consumption ... increases with freq.
BCSCTL1 |=
XTS;
//Set Xin to high freq
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
Case 4: One high freq crystal
on Xt2in
Advantage: Faster computations ... same as Case 3
Disadvantage: Higher power consumption ... increases with freq.
No Aux Clock
Advantage: Faster computations ... same as Case 3
Disadvantage: Higher power consumption ... increases with freq.
No Aux Clock
BCSCTL1 &=
~XT2OFF;
//Set Xt2in on
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_2; //Set MCLK to use XT2
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_2; //Set MCLK to use XT2
Case 5: One low freq crystal
on Xin and one high freq crystal on Xt2in
Advantage: Can run very low power when sleeping and very fast computations when awake.
Disadvantage: Need two crystals.
Advantage: Can run very low power when sleeping and very fast computations when awake.
Disadvantage: Need two crystals.
BCSCTL1 &=
~XTS;
//Set Xin to low freq
BCSCTL1 &= ~XT2OFF; //Set Xt2in on
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
...
BCSCTL2 |= SELM_2; //Set MCLK to use Xt2in
...
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
----
Question: What are the max / min values for a low freq crystal?
BCSCTL1 &= ~XT2OFF; //Set Xt2in on
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
...
BCSCTL2 |= SELM_2; //Set MCLK to use Xt2in
...
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
----
Question: What are the max / min values for a low freq crystal?
Question: Regarding Kris De Vos'
comment,
BCSCTL1 |= XTS;
//Set Xin to high freq
......
do (IFG1 &= ~OFIFG)
while (IFG1 & OFIFG); //Wait until oscillator has stabilized
IFG1 &= ~OFIFG; //Clear the oscillator fault flag
---> At this moment I would also insert a delay as appropriate to fully stabilise LXFTAL1 and / or XT2 ............. (again, it d_e_p_e_n_d_s )
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
......
do (IFG1 &= ~OFIFG)
while (IFG1 & OFIFG); //Wait until oscillator has stabilized
IFG1 &= ~OFIFG; //Clear the oscillator fault flag
---> At this moment I would also insert a delay as appropriate to fully stabilise LXFTAL1 and / or XT2 ............. (again, it d_e_p_e_n_d_s )
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
It is not clear why the delay (At this moment I would also insert a delay)
is needed. At startup, we are running off of the DCO which will quite
likely vary in freq. Or is the concern that the crystal is not up and
running fully yet?
Question: Regarding TI's
comment, " With the "new" F4xx series and the low-power
oscillator the fault detection should work with the LF osc. and 32kHz. For all
other devices there is no fault detection for the LF oscillator (only for the HF
osc.). " What is the proposed solution? I see in example fet140_ta11.c ... the
code does nothing with the osc fault int flag, nor does it wait before using the
osc.
Question: Regarding Kris De
Vos' comment, "... in LPM 3 or 4, an INT will be instantly
serviced by the DCO. ... an INT results in the PC
(return address) being pushed on the stack, followed by the Status register - which holds the
state of LPM0/1/2/3/4. If your MCU
is completely asleep, the INT uses a different Status register setting
(typically where the DCO is
clocking). "
Not exactly sure what, "MCU is completely asleep"
means?
Clyde
Eisenbeis
Reply by ●July 26, 20022002-07-26
Kris,
I received the
following response from a TI contact. The response is in red.
Clyde
Eisenbeis
---------
Draft #4 , Descriptions / snippets of sample code for each of the crystal combinations. Please make additions / corrections.
18 Jul 02----
References:
-Msp430x1xx Family User's Guide (slau049b)-Msp430x1xx Basic Clock System (slaa081)-Msp430x13x, Msp430x140x Data Sheet-Kris De VosOscillator details :
-Low freq crystal: 32.768 Khz
-High freq crystal: 455 Khz - 8 Mhz.-DCO: internal resistor, default: 750 Khz (approximately)-DCO: internal resistor, change RSEL in BCSCTL1: 120 Khz to 4.9 Mhz (data sheet, p46)-32.768 Khz crystal requires no external caps (slaa081, p3)-Other crystals require caps (slaa081, p14)-ADCOSC: additional osc for ADC: 1Mhz (approximately)Nice features:
-Use the low freq crystal during sleep time to minimize power consumption. When awake, use the DCO (preferred) or high freq crystal to perform computations quickly ... then go back to sleep. DCO will start up within 6 usec and uses less power than high freq crystal. High freq crystal will start up after x msecs. Low freq crystal / DCO is most power efficient option.The low freq crystal is not a requirement. The CPU can be clocked only by the DCO if desired. The absolute lowest operating current can be achieved using the DCO and having the low frequency oscillator turned off. The low freq. crystal (or any crystal for that matter), is typically required when:1) You need to clock peripherals (while the CPU is off in a low power mode), and the frequency must be precise. The higher the freq, the greater the power consumption.2) You need a reference frequency so that the DCO can be calibrated.If you need a clock source (for, say, a real time clock) AND you require the CPU to run as fast as possible AND you need the CPU to be clocked at a fairly precise frequency, do this:1) Use a 32KHz crystal to driver the peripherals (ACLK).2) Use an external resistor to provide the current capable of getting the DCO to output 8MHz.3) Use the 32KHz as a reference to calibrate the DCO to 8MHz.An approx. stabilization time for a high speed crystal is 15mSec.-For best power savings, use LPM3. In LPM 3 or 4, an INT will be instantly serviced by the DCO. An INT results in the PC (return address) being pushed on the stack, followed by the Status register - which holds the state of LPM0/1/2/3/4.For the best power savings, use LPM4. But this shuts off the low freq crystal osc. If your application needs this osc. while the CPU is off (say, for peripherals), use LPM3. *ALL* low power modes are exited when the CPU is interrupted. This is the only way to wake up the CPU from sleep.-It is possible to obtain an accurate DCO over temperature by using the 32768 crystal to create a FLL (freq lock loop). This is can be done automatically via hardware for the Msp430x41x/42x/43x/44x. For the other Msp430 parts, can be done via software.The DCO changes with temperature. If the temperature is stable, the DCO will be stable. If it's required to calibrate/recalibrate the DCO, software can calibrate it against a reference (typically the low freq. osc.). The high-end MSP430 devices contain hardware which performs the calibration.Setup prior to selecting crystals:
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
//Next two instructions give ability to watch the clocks on a scope
P5DIR = 0xFF; //Set P5 to output direction
P5SEL = 0xFF; //Set P5 to output MCLK, ACLK, etc.Case 1: No crystals ... use DCO
Advantage: 1) No external parts, 2) Lower power consumption than high freq crystal. <<< This is the lowest power consumption configuration >>>
Disadvantage: 1) Freq may vary, 2) Higher power consumption than low freq crystal / DCO. <<< This (2) is not true <<<Default condition after power up ... around 750 KhzCase 2: One low freq crystal on Xin
Advantage: 1) Lowest power consumption if used in combination with the DCO and LPM3 mode. <<< Not true. No crystals is the lowest power consumption. >>>
Disadvantages: 1) The startup of ACLK is very slow ... up to 1 second, 2) Can be slow to "lock" the DCO to ACLK.A typical startup time for the ACLK osc with a 32KHz crystal is 500mSec.BCSCTL1 &= ~XTS; //Set Xin to low freq
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use XinNote: The above listing may work only with the new F4xx series. There is no fault detection for the low freq osc. The solution for this is ???????????????On devices other than the F4xx series, there is no fault detect for a failing crystal in the low freq. osc. However, the clock will default to the DCO.F4xx devices can detect a failure in the startup of the low freq osc.Case 3: One high freq crystal on Xin
Advantage: 1) Faster computations ... same as Case 4
Disadvantage: 1) Higher power consumption ... increases with freq.BCSCTL1 |= XTS; //Set Xin to high freq
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use XinCase 4: One high freq crystal on Xt2in
Advantage: 1) Faster computations ... same as Case 3
Disadvantage: 1) Higher power consumption ... increases with freq, 2) No Aux clock. <<< But some peripherals can be configured to use SMCLK rather than ACLK.I can think of no reason why you would connect the crystal to the device this way. You would have more flexibility if you connected the crystal to the low freq osc.BCSCTL1 &= ~XT2OFF; //Set Xt2in on
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_2; //Set MCLK to use XT2Case 5: One low freq crystal on Xin and one high freq crystal on Xt2in
Advantage: 1) Can run low power when sleeping and very fast computations when awake (but not as low power as case 2).
Disadvantage: 1) Need two crystals, 2) Higher power consumption than low freq crystal and DCO, 3) Slower to startup than low freq crystal and DCO (ends up using more power)BCSCTL1 &= ~XTS; //Set Xin to low freq
BCSCTL1 &= ~XT2OFF; //Set Xt2in on
do
{
IFG1 &= ~OFIFG; //Clear OSCFault flag
for (i = 0xFF; i > 0; i--); //Time for flag to set
}
while (IFG1 & OFIFG); //OSCFault flag still set?
IFG1 &= ~OFIFG; //Clear osc. fault int. flag
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
...
BCSCTL2 |= SELM_2; //Set MCLK to use Xt2in
...
BCSCTL2 |= SELM_3; //Set MCLK to use Xin
----In general:1) Use the DCO only if you don't need a great speed (<5MHz) and a great freq. accuracy. This is the lowest power consumption.2 ) Add a 32KHz crystal if you need a stable reference to calibrate the DCO, or you need a clock for peripherals when the CPU is in low power mode (LPM3). Usually this osc. is left running forever.3) If you need a high-speed crystal with high accuracy, use a crystal (on the Low Freq Osc [in high speed mode] or on the XT2 oscillator). Depending upon your power budget, you may be able to leave this osc running all of the time. Or you may need to shut off this osc. Or if you only need a stable, high speed freq for only a short duration, the osc can be switched on as needed (and you simply accept the start-up time and the power consumed).Whenever an osc is enabled, a start-up delay is required to allow the osc to stabilize. And you need to check the osc fault flag.Question: Regarding Kris De Vos' comment,BCSCTL1 |= XTS; //Set Xin to high freq
......
do (IFG1 &= ~OFIFG)
while (IFG1 & OFIFG); //Wait until oscillator has stabilized
IFG1 &= ~OFIFG; //Clear the oscillator fault flag
---> At this moment I would also insert a delay as appropriate to fully stabilise LXFTAL1 and / or XT2 ............. (again, it d_e_p_e_n_d_s )
BCSCTL2 |= SELM_3; //Set MCLK to use XinIt is not clear why the delay (At this moment I would also insert a delay) is needed. At startup, we are running off of the DCO which will quite likely vary in freq. Or is the concern that the crystal is not up and running fully yet?The code above is *not* the recommended way to start-up the osc. into a high freq. mode and switch over the MCLK to it.The problem with the above code is that it does not check the osc fault flag sometime *after* the osc fault flag has indicated no fault. Basically, the osc fault flag takes some time to indicate a fault. So, in the above code, it would be possible to clear the flag, the flag would stay cleared (i.e., no fault), and then the osc could fault. Perhaps this is why the above code has a delay (which you question). However, the above code does not check the osc. fault after the delay., and this is dangerous.The other code examples in this letter are correct; they clear the flag, and then delay, and then check the flag. And then they switch over the MCLK if the osc is stable.Clyde Eisenbeis
Reply by ●July 26, 20022002-07-26
>> Draft #4 , Descriptions / snippets of sample
code for each of the crystal
>> combinations. Please make additions / corrections.
>>
>>
>> If you need a clock source (for, say, a real time clock) AND you
require the
>> CPU to run as fast as possible AND you need the CPU to be clocked at a
fairly
>> precise frequency, do this:
>> 1) Use a 32KHz crystal to driver the peripherals (ACLK).
>> 2) Use an external resistor to provide the current capable of getting
the DCO
>> to output 8MHz.
>> 3) Use the 32KHz as a reference to calibrate the DCO to 8MHz.
>>
How do you get the DCO up to 8Mhz? Where does the external resistor apply?
-e
Reply by ●July 26, 20022002-07-26
> The low freq crystal is not a requirement. The CPU can be clocked only by the DCO if desired. > The absolute lowest operating current can be achieved using the DCO and having the low frequency > oscillator turned off. How exactly is this achieved? Isn't the nominal low end of the DCO frequency ~100kHz with internal resistor, and doesn't this require significantly more current than the 32k osc? Is the writer referring to an undocumented lowest external resistor value, or a periodic external wake, with DCO off at other times? > On devices other than the F4xx series, there is no fault detect for a failing crystal in the > low freq. osc. However, the clock will default to the DCO. Does this imply that although there is no fault flag in smaller parts, software can still easily determine fault by verifying the osc source? Bruce
Reply by ●July 26, 20022002-07-26
'Rosc' pin and DCOR switch. See "Oscillator and Clock"
and "recommended operating conditions"
section of docs.
Bruce
> -----Original Message-----
> From: ERIK W. [mailto:ewlists@ewli...]
> Sent: Friday, July 26, 2002 9:27 AM
> To: msp430
> Subject: Re: [msp430] Re: MCLK output
>
>
>
> >> Draft #4 , Descriptions / snippets of sample code for each of the
crystal
> >> combinations. Please make additions / corrections.
> >>
> >>
> >> If you need a clock source (for, say, a real time clock) AND you
require the
> >> CPU to run as fast as possible AND you need the CPU to be clocked
at a fairly
> >> precise frequency, do this:
> >> 1) Use a 32KHz crystal to driver the peripherals (ACLK).
> >> 2) Use an external resistor to provide the current capable of
getting the DCO
> >> to output 8MHz.
> >> 3) Use the 32KHz as a reference to calibrate the DCO to 8MHz.
> >>
>
>
> How do you get the DCO up to 8Mhz? Where does the external resistor apply?
>
> -e
>
>
>
> .
>
>
>
> ">http://docs.yahoo.com/info/terms/
>
>
>
