Not really. It depends on what are defined as what.

Many of the header files I have seen has effectively:
#define WDTCTL 0x0120
#define WDT_ARST_1000 0x5A0C

Using such a header file, the statement:
WDTCTL = WDT_ARST_1000;
will not issue a Watchdog Password Violation reset

On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.

What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.

--- In m..., Joe Radomski wrote:
>
> you are correct.. the way hisexample is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
>
>
>
>
>
>
>
> --- On Fri, 4/10/09, citymouse2u wrote:
>
> From: citymouse2u
> Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> To: m...
> Date: Friday, April 10, 2009, 1:24 PM
>
>
>
>
>
>
>
>
> I think you need to use:
> WDTCTL = WDTPW + WDT_ARST_1000;
> Changing the WD without the password will cause a watchdog reset.
>
> --- In msp430@yahoogroups. com, "ti2tt" wrote:
> >
> > Hello Forum members,
> >
> > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> >
> > WDTCTL = WDTPW + WDTHOLD;
> > WDTCTL = WDT_ARST_1000;
> >
> > The refresh routine for watchdog counter consists as:
> >
> > WDTCTL = WDTPW + WDTCNTCL;
> >
> > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> >
> >
> > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> >
> > Your earliest help in this regard will be highly appreciated. Thanks in advance.
> >
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>

Start a New Thread

You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...

the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.

--- On Fri, 4/10/09, old_cow_yellow wrote:

From: old_cow_yellow
Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
To: m...
Date: Friday, April 10, 2009, 8:04 PM

Not really. It depends on what are defined as what.

Many of the header files I have seen has effectively:
#define WDTCTL 0x0120
#define WDT_ARST_1000 0x5A0C

Using such a header file, the statement:
WDTCTL = WDT_ARST_1000;
will not issue a Watchdog Password Violation reset

On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.

What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.

--- In msp430@yahoogroups. com, Joe Radomski wrote:
>
> you are correct.. the way hisexample is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
>
>
>
>
>
>
>
> --- On Fri, 4/10/09, citymouse2u wrote:
>
> From: citymouse2u
> Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> To: msp430@yahoogroups. com
> Date: Friday, April 10, 2009, 1:24 PM
>
>
>
>
>
>
>
>
> I think you need to use:
> WDTCTL = WDTPW + WDT_ARST_1000;
> Changing the WD without the password will cause a watchdog reset.
>
> --- In msp430@yahoogroups. com, "ti2tt" wrote:
> >
> > Hello Forum members,
> >
> > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> >
> > WDTCTL = WDTPW + WDTHOLD;
> > WDTCTL = WDT_ARST_1000;
> >
> > The refresh routine for watchdog counter consists as:
> >
> > WDTCTL = WDTPW + WDTCNTCL;
> >
> > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> >
> >
> > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> >
> > Your earliest help in this regard will be highly appreciated. Thanks in advance.
> >
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>



Start a New Thread

Hi,

As you all have seen that the #defines are correct in the code but still my question remains unanswered. I am handling the watchdog correctly but at the same time after periodic refresh, I am getting watchdog reset. Can anyone clarify this?

Whether the use of ACLK for watchdog clock source in my code which is 1MHz/32768 is acceptable or not as the MCLK in my case is 250 KHz? Can anyone clarify this also?

I badly need you people help for this. Thanks in advance.
--- In m..., Joe Radomski wrote:
>
> You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...
>
> the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.
>
>
>
> --- On Fri, 4/10/09, old_cow_yellow wrote:
>
> From: old_cow_yellow
> Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> To: m...
> Date: Friday, April 10, 2009, 8:04 PM
>
>
>
>
>
>
>
>
> Not really. It depends on what are defined as what.
>
> Many of the header files I have seen has effectively:
> #define WDTCTL 0x0120
> #define WDT_ARST_1000 0x5A0C
>
> Using such a header file, the statement:
> WDTCTL = WDT_ARST_1000;
> will not issue a Watchdog Password Violation reset
>
> On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.
>
> What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.
>
> --- In msp430@yahoogroups. com, Joe Radomski wrote:
> >
> > you are correct.. the way hisexample is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
> >
> >
> >
> >
> >
> >
> >
> > --- On Fri, 4/10/09, citymouse2u wrote:
> >
> > From: citymouse2u
> > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > To: msp430@yahoogroups. com
> > Date: Friday, April 10, 2009, 1:24 PM
> >
> >
> >
> >
> >
> >
> >
> >
> > I think you need to use:
> > WDTCTL = WDTPW + WDT_ARST_1000;
> > Changing the WD without the password will cause a watchdog reset.
> >
> > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > >
> > > Hello Forum members,
> > >
> > > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> > >
> > > WDTCTL = WDTPW + WDTHOLD;
> > > WDTCTL = WDT_ARST_1000;
> > >
> > > The refresh routine for watchdog counter consists as:
> > >
> > > WDTCTL = WDTPW + WDTCNTCL;
> > >
> > > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> > >
> > >
> > > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> > >
> > > Your earliest help in this regard will be highly appreciated. Thanks in advance.
> > >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>

Start a New Thread

We need a few things cleared up.. You say you are using aclk at 1mhz, ACLK can only be sourced by LFXT1 (in LFMODE)or VLOCLK on the 2419.. Output aclk onto one of the pins and measure it with a scope..

So how are you sourcing it with 1mhz??

The max freq for lfmode (ext xtal) is 50khz.. the source to ACLK also has minimum pulse filter..
--- On Sat, 4/11/09, ti2tt wrote:

From: ti2tt
Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
To: m...
Date: Saturday, April 11, 2009, 6:55 AM

Hi,

As you all have seen that the #defines are correct in the code but still my question remains unanswered. I am handling the watchdog correctly but at the same time after periodic refresh, I am getting watchdog reset. Can anyone clarify this?

Whether the use of ACLK for watchdog clock source in my code which is 1MHz/32768 is acceptable or not as the MCLK in my case is 250 KHz? Can anyone clarify this also?

I badly need you people help for this. Thanks in advance.
--- In msp430@yahoogroups. com, Joe Radomski wrote:
>
> You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...
>
> the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.
>
>
>
> --- On Fri, 4/10/09, old_cow_yellow wrote:
>
> From: old_cow_yellow
> Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> To: msp430@yahoogroups. com
> Date: Friday, April 10, 2009, 8:04 PM
>
>
>
>
>
>
>
>
> Not really. It depends on what are defined as what.
>
> Many of the header files I have seen has effectively:
> #define WDTCTL 0x0120
> #define WDT_ARST_1000 0x5A0C
>
> Using such a header file, the statement:
> WDTCTL = WDT_ARST_1000;
> will not issue a Watchdog Password Violation reset
>
> On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.
>
> What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.
>
> --- In msp430@yahoogroups. com, Joe Radomski wrote:
> >
> > you are correct.. the way hisexample is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
> >
> >
> >
> >
> >
> >
> >
> > --- On Fri, 4/10/09, citymouse2u wrote:
> >
> > From: citymouse2u
> > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > To: msp430@yahoogroups. com
> > Date: Friday, April 10, 2009, 1:24 PM
> >
> >
> >
> >
> >
> >
> >
> >
> > I think you need to use:
> > WDTCTL = WDTPW + WDT_ARST_1000;
> > Changing the WD without the password will cause a watchdog reset.
> >
> > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > >
> > > Hello Forum members,
> > >
> > > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> > >
> > > WDTCTL = WDTPW + WDTHOLD;
> > > WDTCTL = WDT_ARST_1000;
> > >
> > > The refresh routine for watchdog counter consists as:
> > >
> > > WDTCTL = WDTPW + WDTCNTCL;
> > >
> > > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> > >
> > >
> > > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> > >
> > > Your earliest help in this regard will be highly appreciated. Thanks in advance.
> > >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>
>



Start a New Thread

In your original posting, you said"

"The refresh routine for watchdog counter consists as:
" WDTCTL = WDTPW + WDTCNTCL;"

And you also said:

"I am using ACLK as source for watchdog counter."

I can only assume that the #define(s) you used make "ACLK as source for watchdog counter". Otherwise it is funny.

--OCY

--- In m..., "ti2tt" wrote:
>
> Hi,
>
> As you all have seen that the #defines are correct in the code but still my question remains unanswered. I am handling the watchdog correctly but at the same time after periodic refresh, I am getting watchdog reset. Can anyone clarify this?
>
> Whether the use of ACLK for watchdog clock source in my code which is 1MHz/32768 is acceptable or not as the MCLK in my case is 250 KHz? Can anyone clarify this also?
>
> I badly need you people help for this. Thanks in advance.
> --- In m..., Joe Radomski wrote:
> >
> > You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't� have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...
> > �
> > the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.
> > �
> >
> >
> > --- On Fri, 4/10/09, old_cow_yellow wrote:
> >
> > From: old_cow_yellow
> > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > To: m...
> > Date: Friday, April 10, 2009, 8:04 PM
> >
> >
> >
> >
> >
> >
> >
> >
> > Not really. It depends on what are defined as what.
> >
> > Many of the header files I have seen has effectively:
> > #define WDTCTL 0x0120
> > #define WDT_ARST_1000 0x5A0C
> >
> > Using such a header file, the statement:
> > WDTCTL = WDT_ARST_1000;
> > will not issue a Watchdog Password Violation reset
> >
> > On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.
> >
> > What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.
> >
> > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > >
> > > you are correct.. the way hisexample �is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
> > > �
> > > �
> > > �
> > > �
> > > �
> > >
> > >
> > > --- On Fri, 4/10/09, citymouse2u wrote:
> > >
> > > From: citymouse2u
> > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > To: msp430@yahoogroups. com
> > > Date: Friday, April 10, 2009, 1:24 PM
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > I think you need to use:
> > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > Changing the WD without the password will cause a watchdog reset.
> > >
> > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > >
> > > > Hello Forum members,
> > > >
> > > > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> > > >
> > > > WDTCTL = WDTPW + WDTHOLD;
> > > > WDTCTL = WDT_ARST_1000;
> > > >
> > > > The refresh routine for watchdog counter consists as:
> > > >
> > > > WDTCTL = WDTPW + WDTCNTCL;
> > > >
> > > > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > > > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> > > >
> > > >
> > > > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> > > >
> > > > Your earliest help in this regard will be highly appreciated. Thanks in advance.
> > > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
>

Start a New Thread

In your original posting, you said"

"The refresh routine for watchdog counter consists as:
" WDTCTL = WDTPW + WDTCNTCL;"

And you also said:

"I am using ACLK as source for watchdog counter."

I am not sure about that. I can only assume that the #define(s) you used make "ACLK as source for watchdog counter".

--OCY

--- In m..., "ti2tt" wrote:
>
> Hi,
>
> As you all have seen that the #defines are correct in the code but still my question remains unanswered. I am handling the watchdog correctly but at the same time after periodic refresh, I am getting watchdog reset. Can anyone clarify this?
>
> Whether the use of ACLK for watchdog clock source in my code which is 1MHz/32768 is acceptable or not as the MCLK in my case is 250 KHz? Can anyone clarify this also?
>
> I badly need you people help for this. Thanks in advance.
> --- In m..., Joe Radomski wrote:
> >
> > You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't� have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...
> > �
> > the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.
> > �
> >
> >
> > --- On Fri, 4/10/09, old_cow_yellow wrote:
> >
> > From: old_cow_yellow
> > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > To: m...
> > Date: Friday, April 10, 2009, 8:04 PM
> >
> >
> >
> >
> >
> >
> >
> >
> > Not really. It depends on what are defined as what.
> >
> > Many of the header files I have seen has effectively:
> > #define WDTCTL 0x0120
> > #define WDT_ARST_1000 0x5A0C
> >
> > Using such a header file, the statement:
> > WDTCTL = WDT_ARST_1000;
> > will not issue a Watchdog Password Violation reset
> >
> > On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.
> >
> > What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.
> >
> > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > >
> > > you are correct.. the way hisexample �is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
> > > �
> > > �
> > > �
> > > �
> > > �
> > >
> > >
> > > --- On Fri, 4/10/09, citymouse2u wrote:
> > >
> > > From: citymouse2u
> > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > To: msp430@yahoogroups. com
> > > Date: Friday, April 10, 2009, 1:24 PM
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > I think you need to use:
> > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > Changing the WD without the password will cause a watchdog reset.
> > >
> > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > >
> > > > Hello Forum members,
> > > >
> > > > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> > > >
> > > > WDTCTL = WDTPW + WDTHOLD;
> > > > WDTCTL = WDT_ARST_1000;
> > > >
> > > > The refresh routine for watchdog counter consists as:
> > > >
> > > > WDTCTL = WDTPW + WDTCNTCL;
> > > >
> > > > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > > > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> > > >
> > > >
> > > > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> > > >
> > > > Your earliest help in this regard will be highly appreciated. Thanks in advance.
> > > >
> > >
> > >
> > >
> > >
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Start a New Thread

Hello,

I am using a 1MHz XTAL at LFXT1 and dividing by 1 to get ACLK = 1MHz as below,
BIC #OSCOFF,SR // Turn on osc.
BIS.B #XTS+DIVA_0,&BCSCTL1 // HF mode //ACLK Divide by 1

I have checked this on DSO by outputting to an i/o pin. Is anything incorrect in this configuration?

Thanks in advance.
--- In m..., Joe Radomski wrote:
>
> We need a few things cleared up.. You say you are using aclk at 1mhz, ACLK can only be sourced by LFXT1 (in LFMODE)or VLOCLK on the 2419.. Output aclk onto one of the pins and measure it with a scope..
>
> So how are you sourcing it with 1mhz??
>
> The max freq for lfmode (ext xtal) is 50khz.. the source to ACLK also has minimum pulse filter..
>
>
> --- On Sat, 4/11/09, ti2tt wrote:
>
> From: ti2tt
> Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> To: m...
> Date: Saturday, April 11, 2009, 6:55 AM
>
>
>
>
>
>
>
>
> Hi,
>
> As you all have seen that the #defines are correct in the code but still my question remains unanswered. I am handling the watchdog correctly but at the same time after periodic refresh, I am getting watchdog reset. Can anyone clarify this?
>
> Whether the use of ACLK for watchdog clock source in my code which is 1MHz/32768 is acceptable or not as the MCLK in my case is 250 KHz? Can anyone clarify this also?
>
> I badly need you people help for this. Thanks in advance.
> --- In msp430@yahoogroups. com, Joe Radomski wrote:
> >
> > You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...
> >
> > the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.
> >
> >
> >
> > --- On Fri, 4/10/09, old_cow_yellow wrote:
> >
> > From: old_cow_yellow
> > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > To: msp430@yahoogroups. com
> > Date: Friday, April 10, 2009, 8:04 PM
> >
> >
> >
> >
> >
> >
> >
> >
> > Not really. It depends on what are defined as what.
> >
> > Many of the header files I have seen has effectively:
> > #define WDTCTL 0x0120
> > #define WDT_ARST_1000 0x5A0C
> >
> > Using such a header file, the statement:
> > WDTCTL = WDT_ARST_1000;
> > will not issue a Watchdog Password Violation reset
> >
> > On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.
> >
> > What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.
> >
> > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > >
> > > you are correct.. the way hisexample is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > --- On Fri, 4/10/09, citymouse2u wrote:
> > >
> > > From: citymouse2u
> > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > To: msp430@yahoogroups. com
> > > Date: Friday, April 10, 2009, 1:24 PM
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > I think you need to use:
> > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > Changing the WD without the password will cause a watchdog reset.
> > >
> > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > >
> > > > Hello Forum members,
> > > >
> > > > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> > > >
> > > > WDTCTL = WDTPW + WDTHOLD;
> > > > WDTCTL = WDT_ARST_1000;
> > > >
> > > > The refresh routine for watchdog counter consists as:
> > > >
> > > > WDTCTL = WDTPW + WDTCNTCL;
> > > >
> > > > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > > > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> > > >
> > > >
> > > > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> > > >
> > > > Your earliest help in this regard will be highly appreciated. Thanks in advance.
> > > >
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Hello,

Below is the code I am using for watchdog,

#define WDT_ARST_1000 (WDTPW+WDTCNTCL+WDTSSEL)

void WatchdogHalt (void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
}

void EnableWatchdog (void)
{
WDTCTL = WDT_ARST_1000;
}

void ResetWatchdog (void)
{
WDTCTL = WDTPW + WDTCNTCL; //Refresh watchdog counter
}

void main (void)
{
WatchdogHalt(); //Halt internal WDOG
_SelectCrystalOsc(); //Configure XTAL
EnableWatchdog(); //Enable internal WDOG
ResetWatchdog(); //Reset internal WDOG
while(1)
{
ResetWatchdog(); //Reset internal WDOG
}
}

The bits related to watchdog sfrs are defined in msp430F24x.h file. Please guide me.

Thanks in advance.
--- In m..., "old_cow_yellow" wrote:
>
> In your original posting, you said"
>
> "The refresh routine for watchdog counter consists as:
> " WDTCTL = WDTPW + WDTCNTCL;"
>
> And you also said:
>
> "I am using ACLK as source for watchdog counter."
>
> I am not sure about that. I can only assume that the #define(s) you used make "ACLK as source for watchdog counter".
>
> --OCY
>
> --- In m..., "ti2tt" wrote:
> >
> > Hi,
> >
> > As you all have seen that the #defines are correct in the code but still my question remains unanswered. I am handling the watchdog correctly but at the same time after periodic refresh, I am getting watchdog reset. Can anyone clarify this?
> >
> > Whether the use of ACLK for watchdog clock source in my code which is 1MHz/32768 is acceptable or not as the MCLK in my case is 250 KHz? Can anyone clarify this also?
> >
> > I badly need you people help for this. Thanks in advance.
> > --- In m..., Joe Radomski wrote:
> > >
> > > You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't� have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...
> > > �
> > > the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.
> > > �
> > >
> > >
> > > --- On Fri, 4/10/09, old_cow_yellow wrote:
> > >
> > > From: old_cow_yellow
> > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > To: m...
> > > Date: Friday, April 10, 2009, 8:04 PM
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > Not really. It depends on what are defined as what.
> > >
> > > Many of the header files I have seen has effectively:
> > > #define WDTCTL 0x0120
> > > #define WDT_ARST_1000 0x5A0C
> > >
> > > Using such a header file, the statement:
> > > WDTCTL = WDT_ARST_1000;
> > > will not issue a Watchdog Password Violation reset
> > >
> > > On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.
> > >
> > > What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.
> > >
> > > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > > >
> > > > you are correct.. the way hisexample �is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
> > > > �
> > > > �
> > > > �
> > > > �
> > > > �
> > > >
> > > >
> > > > --- On Fri, 4/10/09, citymouse2u wrote:
> > > >
> > > > From: citymouse2u
> > > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > > To: msp430@yahoogroups. com
> > > > Date: Friday, April 10, 2009, 1:24 PM
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > > I think you need to use:
> > > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > > Changing the WD without the password will cause a watchdog reset.
> > > >
> > > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > > >
> > > > > Hello Forum members,
> > > > >
> > > > > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> > > > >
> > > > > WDTCTL = WDTPW + WDTHOLD;
> > > > > WDTCTL = WDT_ARST_1000;
> > > > >
> > > > > The refresh routine for watchdog counter consists as:
> > > > >
> > > > > WDTCTL = WDTPW + WDTCNTCL;
> > > > >
> > > > > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > > > > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> > > > >
> > > > >
> > > > > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> > > > >
> > > > > Your earliest help in this regard will be highly appreciated. Thanks in advance.
> > > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
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> > >
> > >
> > >
> > >
> > >
>

Start a New Thread

usually before you source anything off an external xtal you should test that it is stable, then once the osc fault flags are clear then switch your source to that clock. in this case you can set up the aclk divider immediately but you should not proceed on enabling functions like the wd timer until you know the clock is stable by checking the fault flags..



--- On Mon, 4/13/09, ti2tt wrote:

From: ti2tt
Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
To: m...
Date: Monday, April 13, 2009, 3:20 AM

Hello,

I am using a 1MHz XTAL at LFXT1 and dividing by 1 to get ACLK = 1MHz as below,
BIC #OSCOFF,SR // Turn on osc.
BIS.B #XTS+DIVA_0, &BCSCTL1 // HF mode //ACLK Divide by 1

I have checked this on DSO by outputting to an i/o pin. Is anything incorrect in this configuration?

Thanks in advance.
--- In msp430@yahoogroups. com, Joe Radomski wrote:
>
> We need a few things cleared up.. You say you are using aclk at 1mhz, ACLK can only be sourced by LFXT1 (in LFMODE)or VLOCLK on the 2419.. Output aclk onto one of the pins and measure it with a scope..
>
> So how are you sourcing it with 1mhz??
>
> The max freq for lfmode (ext xtal) is 50khz.. the source to ACLK also has minimum pulse filter..
>
>
> --- On Sat, 4/11/09, ti2tt wrote:
>
> From: ti2tt
> Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> To: msp430@yahoogroups. com
> Date: Saturday, April 11, 2009, 6:55 AM
>
>
>
>
>
>
>
>
> Hi,
>
> As you all have seen that the #defines are correct in the code but still my question remains unanswered. I am handling the watchdog correctly but at the same time after periodic refresh, I am getting watchdog reset. Can anyone clarify this?
>
> Whether the use of ACLK for watchdog clock source in my code which is 1MHz/32768 is acceptable or not as the MCLK in my case is 250 KHz? Can anyone clarify this also?
>
> I badly need you people help for this. Thanks in advance.
> --- In msp430@yahoogroups. com, Joe Radomski wrote:
> >
> > You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...
> >
> > the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.
> >
> >
> >
> > --- On Fri, 4/10/09, old_cow_yellow wrote:
> >
> > From: old_cow_yellow
> > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > To: msp430@yahoogroups. com
> > Date: Friday, April 10, 2009, 8:04 PM
> >
> >
> >
> >
> >
> >
> >
> >
> > Not really. It depends on what are defined as what.
> >
> > Many of the header files I have seen has effectively:
> > #define WDTCTL 0x0120
> > #define WDT_ARST_1000 0x5A0C
> >
> > Using such a header file, the statement:
> > WDTCTL = WDT_ARST_1000;
> > will not issue a Watchdog Password Violation reset
> >
> > On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.
> >
> > What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.
> >
> > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > >
> > > you are correct.. the way hisexample is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > --- On Fri, 4/10/09, citymouse2u wrote:
> > >
> > > From: citymouse2u
> > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > To: msp430@yahoogroups. com
> > > Date: Friday, April 10, 2009, 1:24 PM
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > I think you need to use:
> > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > Changing the WD without the password will cause a watchdog reset.
> > >
> > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > >
> > > > Hello Forum members,
> > > >
> > > > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> > > >
> > > > WDTCTL = WDTPW + WDTHOLD;
> > > > WDTCTL = WDT_ARST_1000;
> > > >
> > > > The refresh routine for watchdog counter consists as:
> > > >
> > > > WDTCTL = WDTPW + WDTCNTCL;
> > > >
> > > > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > > > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> > > >
> > > >
> > > > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> > > >
> > > > Your earliest help in this regard will be highly appreciated. Thanks in advance.
> > > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
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Start a New Thread

Hello,

The clock stability I have checked before assigning ACLK. This I have ensured on oscilloscope by outputting the signal to i/o pin. Is there any other settings required to use the internal watchdog? any working code for this will be much helpful.

Thanks in advance.

--- In m..., Joe Radomski wrote:
>
> usually before you source anything off an external xtal you should test that it is stable, then once the osc fault flags are clear then switch your source to that clock. in this case you can set up the aclk divider immediately but you should not proceed on enabling functions like the wd timer until you know the clock is stable by checking the fault flags..
>
>
>
>
>
> --- On Mon, 4/13/09, ti2tt wrote:
>
> From: ti2tt
> Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> To: m...
> Date: Monday, April 13, 2009, 3:20 AM
>
>
>
>
>
>
>
>
> Hello,
>
> I am using a 1MHz XTAL at LFXT1 and dividing by 1 to get ACLK = 1MHz as below,
> BIC #OSCOFF,SR // Turn on osc.
> BIS.B #XTS+DIVA_0, &BCSCTL1 // HF mode //ACLK Divide by 1
>
> I have checked this on DSO by outputting to an i/o pin. Is anything incorrect in this configuration?
>
> Thanks in advance.
> --- In msp430@yahoogroups. com, Joe Radomski wrote:
> >
> > We need a few things cleared up.. You say you are using aclk at 1mhz, ACLK can only be sourced by LFXT1 (in LFMODE)or VLOCLK on the 2419.. Output aclk onto one of the pins and measure it with a scope..
> >
> > So how are you sourcing it with 1mhz??
> >
> > The max freq for lfmode (ext xtal) is 50khz.. the source to ACLK also has minimum pulse filter..
> >
> >
> > --- On Sat, 4/11/09, ti2tt wrote:
> >
> > From: ti2tt
> > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > To: msp430@yahoogroups. com
> > Date: Saturday, April 11, 2009, 6:55 AM
> >
> >
> >
> >
> >
> >
> >
> >
> > Hi,
> >
> > As you all have seen that the #defines are correct in the code but still my question remains unanswered. I am handling the watchdog correctly but at the same time after periodic refresh, I am getting watchdog reset. Can anyone clarify this?
> >
> > Whether the use of ACLK for watchdog clock source in my code which is 1MHz/32768 is acceptable or not as the MCLK in my case is 250 KHz? Can anyone clarify this also?
> >
> > I badly need you people help for this. Thanks in advance.
> > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > >
> > > You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...
> > >
> > > the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.
> > >
> > >
> > >
> > > --- On Fri, 4/10/09, old_cow_yellow wrote:
> > >
> > > From: old_cow_yellow
> > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > To: msp430@yahoogroups. com
> > > Date: Friday, April 10, 2009, 8:04 PM
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > Not really. It depends on what are defined as what.
> > >
> > > Many of the header files I have seen has effectively:
> > > #define WDTCTL 0x0120
> > > #define WDT_ARST_1000 0x5A0C
> > >
> > > Using such a header file, the statement:
> > > WDTCTL = WDT_ARST_1000;
> > > will not issue a Watchdog Password Violation reset
> > >
> > > On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.
> > >
> > > What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.
> > >
> > > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > > >
> > > > you are correct.. the way hisexample is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > > --- On Fri, 4/10/09, citymouse2u wrote:
> > > >
> > > > From: citymouse2u
> > > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > > To: msp430@yahoogroups. com
> > > > Date: Friday, April 10, 2009, 1:24 PM
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > > I think you need to use:
> > > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > > Changing the WD without the password will cause a watchdog reset.
> > > >
> > > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > > >
> > > > > Hello Forum members,
> > > > >
> > > > > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> > > > >
> > > > > WDTCTL = WDTPW + WDTHOLD;
> > > > > WDTCTL = WDT_ARST_1000;
> > > > >
> > > > > The refresh routine for watchdog counter consists as:
> > > > >
> > > > > WDTCTL = WDTPW + WDTCNTCL;
> > > > >
> > > > > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > > > > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> > > > >
> > > > >
> > > > > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> > > > >
> > > > > Your earliest help in this regard will be highly appreciated. Thanks in advance.
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