Tilera to Introduce 64-Core Processor

Alex Colvin wrote:

snip

> For most programs, the best way to use two cores is to turn one off.

I think that is an over generalization.  Of course it depends a lot upon 
what you are doing, but two processors can frequently be used 
productively fairly easily.  For a few examples, most systems run an OS 
that has a few background/intermittent  tasks.  These naturally can be 
done by the second processor, which not only takes their processing 
demands off the core you are using, but eliminates the overhead of the 
task switches.

In addition, systems with a non-trivial user interface can fairly easily 
be modified to offload that functionality to the second core, which 
improves responsiveness.

And, some programs have fairly separable functionality that can 
reasonably be done on a second processor.  For example, though it almost 
certainly isn't compute bound, a word processor could separate the 
inline spell and grammar checks to a second core.  And a spreadsheet can 
often have multiple "threads" of cells that can be updated in parallel.

But this kind of stuff gets harder and harder to take advantage of with 
increasing number of cores.  that is, while it is fairly easy to take 
advantage of two cores, it is harder to use four and harder still to use 
eight.

 > With
> 64 you can start running pipelines and arrays, which is what the Tilera 
> looks like it was designed for.


Yes, agreed.  But taking advantage of those techniques does require 
substantial programming effort.  It is probably worth the effort for 
some applications, but how many is the big question.


-- 
  - Stephen Fuld
(e-mail address disguised to prevent spam)

>> For most programs, the best way to use two cores is to turn one off.

>In addition, systems with a non-trivial user interface can fairly easily 
>be modified to offload that functionality to the second core, which 
>improves responsiveness.

True. Most systems are running more than one program. But most programs 
are single-threaded. And the cost of thread initiation and switching 
doesn't justify a second core.

> > With
>> 64 you can start running pipelines and arrays, which is what the Tilera 
>> looks like it was designed for.


>Yes, agreed.  But taking advantage of those techniques does require 
>substantial programming effort.  It is probably worth the effort for 
>some applications, but how many is the big question.

as we say, the $64 question...
-- 
	mac the na�f

In comp.sys.ibm.pc.hardware.chips Alex Colvin <alexc@theworld.com> wrote:
> Of course not - it doesn't run Office 97, so it's not a general-purpose
> CPU. they're going for the embedded market, which is much larger, but
> populated largely by 8-bit CPUs, battery-power ARMs, DSPs, FPGAs.
>
> Perhaps it'll find use as a game platform, set-top box, speech recognizer,
> packet sniffer.

A packet sniffer would match the other articles I've seen - one of their
early customers is going to be using it for a "network security appliance."

I doubt it will work very well as a game platform CPU per se, although for
GPUs, NVidia is going in sort of that direction with their generalized
stream processors on the GF8 series.

-- 
Nate Edel                               http://www.cubiclehermit.com/
 preferred email  | "With all the accumulated wit and wisdom in the       
 is "nate" at the |  world, it is pointless to try to select a few    
 posting domain   |  choice quotes." (some guy from my HS yearbook)

"AirRaid" <AirRaidJet@gmail.com> wrote in message 
news:1192125734.851641.264020@v3g2000hsg.googlegroups.com...

> Tilera to Introduce 64-Core Processor

Is it YAXP (Yet Another X86 Processor) or is it introducing a new 
instruction set?

-- 
And loving it,

-Q
_________________________________________________
Qu0llSixFour@gmail.com
(Replace the "SixFour" with numbers to email me) 

In article <1192261329.530345.58730@v29g2000prd.googlegroups.com>, 
AirRaid1500@gmail.com says...
> On Oct 11, 4:45 pm, "Michael N. Moran" <mnmo...@bellsouth.net> wrote:
> > AirRaid wrote:
> > > Tilera to Introduce 64-Core Processor
> > > By Andy Patrizio
> >
> > Oh great ... more marketing hyperbole spam from AirRaid.
> 
> nice attempt at trolling.
> 
Yikes!

-- 
  Keith

In article <47102b07.1584645156@news.singnet.com.sg>, a?n?g?e?
l@lovergirl.lrigrevol.moc.com says...
> On Fri, 12 Oct 2007 17:48:26 -0400, krw <krw@att.bizzzz> wrote:
> 
> >The PowerPC 970MP was ten layers.  The bad news is that you need them 
> >for things other than interconnecting cores.  The same thing that's 
> >forcing more cores (because we have nothing better to do with 
> >transistors) is forcing more layers of interconnect, just to wire 
> >them all up.
> 
> So it'll just be a real mess isn't it?

That's why they pay the big bux. ;-)

> And they can't just make more cores using the same blue print can 
> they? 

They do, More or less.  The designs are identical, the layouts may or 
may not be the same.  Sometimes a mirror or rotated image is wanted.  
If the cache, memory controller, or bus interface unit is in the 
center a better layout can be had by tailoring the cores to the 
specific needs.  They are not photographic images of each other 
though.  

> Since changing the design
> from 64 core to say 128 core would require a whole new design with
> like double the number of interconnects no?

Double the number, or 2^n.  They're spread over a larger area though.  
Wiring congestion and lengths get to be problems though.  I've never 
been involved with 128 processors, though.  I'm sure there are other 
gotchas in there.

> Or are they actually just saying every core is identical and only
> directly connected to their immediate neighbours? Since this seems to
> be the logical way to me.

Logical, simple, wrong.  ;-)  How do you get to the outside?  You're 
strangling the inner processors of memory and swamping the outer ones 
with data.

> >Cores speeds are likely lower so it can be cooled.
> 
> Wouldn't this be like getting close to the same problem as whowasit's
> parallel hz idea? 


> Seems to me like this 64core thingy is only going to
> be good for certain problems since most stuff just isn't going to be
> really parallelizable to such an extent. While many things will just
> suffer from the low clockspeed/high latency. In other words, not going
> to be a mass market product?

Some day it may.  That someday isn't today, at least in the commodity 
market.

-- 
  Keith

In article <4D%Pi.6036$lE2.4762@newssvr22.news.prodigy.net>, 
redelm@ev1.net.invalid says...
> In comp.sys.ibm.pc.hardware.chips krw <krw@att.bizzzz> wrote in part:
> > In article <YiOPi.1158$uC1.469@trnddc04>, w.newell@TAKEOUTverizon.net 
> >> On Fri, 12 Oct 2007 16:16:32 +0000, The little lost angel wrote:
> >> > I'm a bit puzzled by this. If the cores are laid out in a
> >> > checkerboard like grid, doesn't that mean each core is linked
> >> > to the 8 cores around it? So it would still come up to some
> >> > kind of latency bottleneck wouldn't it? What difference is
> >> > it from AMD's ccHTT links except they've got a few more?
> 
> >> A cpu has more than one layer. I'm not sure how many it has but I think
> >> AMD's is about 9 layers with the K8. I'd suspect the tile64 is a lot more.
> >> The interconnect would be similar to AMD's HT interconnect bus.
> > 
> > The PowerPC 970MP was ten layers.  The bad news is that you
> > need them for things other than interconnecting cores.  The same
> > thing that's forcing more cores (because we have nothing better
> > to do with transistors) is forcing more layers of interconnect,
> > just to wire them all up.
> 
> Like L'Angel, I'm a bit puzzled, but in a different direction:
> Lay the cores out in a flat checkerboard.  Bus each row together
> to a shared x8 section of L2 cache.  One/two layers max.  Those
> cores better each have their own L1s!

My point was that as transistors get smaller, more layers are needed 
simply to support the local interconnect.  We were at ten layers 
three years ago.  More doesn't come cheap.  

One layer doesn't do much since you don't get to put resistors on top 
to jump over wires.  ;-)  Two aren't going to support much density of 
wiring either.


> >> Probably the reason the core speeds are kept a lot lower. I
> >> know I'd like to have one of these on a small MB compatable
> >> with an ATX/BTX case, but realisitically, I have no need
> >> for so much power. But cutting electrical use would be nice.
> > 
> > Cores speeds are likely lower so it can be cooled.
> 
> And power/gd current handled.  Also to avoid overloading
> L2 and main RAM busses.

Yes, and think about the number of L2 ports needed. <shudder>

-- 
  Keith

On Sun, 14 Oct 2007 06:47:11 +1000, Qu0ll wrote:

> "AirRaid" <AirRaidJet@gmail.com> wrote in message 
> news:1192125734.851641.264020@v3g2000hsg.googlegroups.com...
> 
>> Tilera to Introduce 64-Core Processor
> 
> Is it YAXP (Yet Another X86 Processor) or is it introducing a new 
> instruction set?

It's a new cpu. Right now only supported with Linux. Which is fine with
me. I don't use Microsloth anyway.

-- 
Want the ultimate in free OTA SD/HDTV Recorder? http://mythtv.org
http://mysettopbox.tv/knoppmyth.html Usenet alt.video.ptv.mythtv
My server http://wesnewell.no-ip.com/cpu.php
HD Tivo S3 compared http://wesnewell.no-ip.com/mythtivo.htm 

Nate Edel wrote:

>I doubt it will work very well as a game platform CPU per se, although for
>GPUs, NVidia is going in sort of that direction with their generalized
>stream processors on the GF8 series.

It does make you wander about it n-bing used as a *chess* game
playing platform though.  64 cores, 64 squares... Maybe there
is some clever optimization waiting to be discovered. :)

-- 
Guy Macon
<http://www.guymacon.com/>

Qu0ll wrote:

>Is it YAXP (Yet Another X86 Processor) or is it introducing a new 
>instruction set?

Tilara isn't saying.  And the *would* be saying if it was x86.

-- 
Guy Macon
<http://www.guymacon.com/>