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Flash Memory

Started by NikolaDzoniRistic 5 years ago10 replieslatest reply 5 years ago1422 views

Hello all,

I am using a flash memory chip: "WINBOND 25N01GVZEIG". I am having a lot of difficulty making it work because of my  bad understanding of the product datasheet. I need to knowe exacly how to write into the flash memory and also how to read from it. I am using standard SPI protocol (mode 0) and the only thing that I have managed is to read the JEDEC ID of the device. I put a picture of the JEDEC ID instruction sequence on the oscilloscope in the attachment.  So, these are the problems:

The HOLD/ pin of the chip is connected to Vcc (3.3 volts), and so is the WP/ pin. I am not able to change the state of any bit in any of the three status registers and I am also not able to read any of them  (I know this because the default values of bits TB, BP0, BP1. BP2, and BP3 that belong to the protection status register are "1" by default when powering up the memory chip, but I receive nothing from the data output pin of the memory chip when I execute the read status register instruction). Can someone please tell me the exact SPI sequence that is needed to do these tasks? I put a picture of trying to write 0xFF into the status register 1 and a picture of reading the same register.

Setting the bit WEL (write enable latch) is done by executing the command "write enable". I executed the command, but when I read the value of status register 3 (this register contains the WEL bit),  the value I receive is "0" the whole time. I put a picture of executing write enable command and trying to read status register 3 in the attachment.

In the pictures, the yellow signal is the clock, the blue is the chip select, the green is the data input and the purple is the data output of the flash memory. It would mean a lot to me if you helped me,

Best regards,

Nikola Ristic

signals:datasheet:

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Reply by CustomSargeAugust 23, 2019

Let's start with what processor you're using. Then does it have a native SPI function and are you using it. I think the best way to learn a protocol is to write your own "bit-banging" version. It gives you total control of all signal states. Now you can get exact matches of read & write sequences. The chips I've used go down to near DC for clocking speed, so you can write as slow a sequence as you need to verify proper state combinations.

I've not done SPI, but taught myself I2C this way. Once functional, I sped it up to as fast as I could then froze the complete sequences in 1 frame of the DSO. Then, I worked with the native I2C handler, since I knew what the sequences should look like. In Freescale (NXP) S08 series you can use the same pins as the handler, just don't activate it. Work it with BSET & BCLR of port / bit.

Also, the Winbond device you spec has a Lot of options, I'd start on a Much simpler flash chip.

It takes a while, but satisfying. Good Hunting  <<<)))

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Reply by MichaelKellettAugust 23, 2019

Looking at read status reg 1 it looks to me as if you send 0x0f, 0x0a, 0x00

What did you mean to send ?

MK
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Reply by NikolaDzoniRisticAugust 23, 2019

Hello Michael


Yes you are correct, that is exacly what i ment to send. On page 28 of the datasheet, the instructions say that I should first send 0x0F (or 0x05), then the adress of the status register which value i want to read (in my case it is status register 1 which means the adress is 0x0A), and then nothing more is sent to the memory, however the memory shold send me back the value of the status register after I have sent the adress. If you have any suggestion, I'm open to it.


Best regards,

Nikola

[ - ]
Reply by MichaelKellettAugust 23, 2019

I missed that.

Can't see much else except maybe this:

Note that the chip select pin (/CS) must track the VCC supply level at power-up until the VCC-min level and tVSL
time delay is reached, and it must also track the VCC supply level at power-down to prevent adverse
command sequence. If needed a pull-up resister on /CS can be used to accomplish this.

Might be worth trying sending a chip reset before you try the Wren command.

MK

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Reply by NikolaDzoniRisticAugust 23, 2019
I solved the problem with a pull up resistor. Thank you for your time and help :)
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Reply by mr_banditAugust 23, 2019

Looking at the data sheet:

Write Protect (/WP) The Write Protect (/WP) pin can be used to prevent the Status Register from being written. Used in conjunction with the Status Register’s Block Protect bits BP[3:0] and Status Register Protect SRP bits SRP[1:0], a portion as small as 256K-Byte (2x128KB blocks) or up to the entire memory array can be hardware protected. The WP-E bit in the Protection Register (SR-1) controls the functions of the /WP pin. When WP-E=0, the device is in the Software Protection mode that only SR-1 can be protected. The /WP pin functions as a data I/O pin for the Quad SPI operations, as well as an active low input pin for the Write Protection function for SR-1. Refer to section 7.1.3 for detail information. When WP-E=1, the device is in the Hardware Protection mode that /WP becomes a dedicated active low input pin for the Write Protection of the entire device. If /WP is tied to GND, all “Write/Program/Erase” functions are disabled. The entire device (including all registers, memory array, OTP pages) will become read-only. Quad SPI read operations are also disabled when WP-E is set to 1. 

Look at the registers in the above extract from the datasheet. I suspect that is one of your issues.

Reading datasheets is a learned art. Are you using the quad SPI read? If so, /WP and /HOLD are I/O pins. You are on the right track trying to read the status registers, but you imply you just get trash back.

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Reply by NikolaDzoniRisticAugust 23, 2019

Hello


I agree with you, reading dasheets is something that has to be learned with time. This is not the first chip I am programming, but I am still young in that domain.


I am using standard SPI protocol to communicate with the chip. On page 12 of the datasheet it is mentioned that the chip supports standard SPI instructions mode 0 and 3 (I amm using mode 0). I am not using dual or quad SPI.


The text that you copy pasted from the datasheet is exacly where I think the problem is also, however I do not exacly understand what it means. 


Write Protect (/WP) The Write Protect (/WP) pin can be used to prevent the Status Register from being written - Am i right when i say that first of all, I need to connect /WP to Vcc so that I can write into the status registers? If my assumption is right, sending 0x1F and then 0x0A and then sending 0xFF should set all the bits in the status register? However, my problem is that when i execute that SPI sequence and then execute the read status register command (0x0F 0x0A NULL), I receive nothing (remember that i manage to read the JEDEC ID right so i know it is not a soldering issue).


I am open to suggestions,

Nikola



[ - ]
Reply by mr_banditAugust 23, 2019

datasheet: 

Upon power-up or at power-down, the W25N01GV will maintain a reset condition while VCC is below the threshold value of VWI, (See Power-up Timing and Voltage Levels and Figure 30a). While reset, all operations are disabled and no instructions are recognized. During power-up and after the VCC voltage exceeds VWI, all program and erase related instructions are further disabled for a time delay of tPUW. This includes the Write Enable, Program Execute, Block Erase and the Write Status Register instructions. Note that the chip select pin (/CS) must track the VCC supply level at power-up until the VCC-min level and tVSL time delay is reached, and it must also track the VCC supply level at power-down to prevent adverse command sequence. If needed a pull-up resister on /CS can be used to accomplish this. 

After power-up the device is automatically placed in a write-disabled state with the Status Register Write Enable Latch (WEL) set to a 0. A Write Enable instruction must be issued before a Program Execute or Block Erase instruction will be accepted. After completing a program or erase instruction the Write Enable Latch (WEL) is automatically cleared to a write-disabled state of 0. 

Software controlled write protection is facilitated using the Write Status Register instruction and setting the Status Register Protect (SRP0, SRP1) and Block Protect (TB, BP[3:0]) bits. These settings allow a portion or the entire memory array to be configured as read only. Used in conjunction with the Write Protect (/WP) pin, changes to the Status Register can be enabled or disabled under hardware control. See Protection Register section for further information.

The WP-E bit in Protection Register (SR-1) is used to enable the hardware protection. When WP-E is set to 1, bringing /WP low in the system will block any Write/Program/Erase command to the W25N01GV, the device will become read-only. The Quad SPI operations are also disabled when WP-E is set to 1. 


It sometimes helps, when reading a datasheet like this, to draw out the bootup and other sequences. The tables on page 23-24 are good. Understanding what the bits do in the sequence will really help you.

Success to you. What kind of project is this? personal, school, job? In any case, you will learn a lot from it. Sometimes, you just need to live with the datasheet for a while, before that one line now makes sense && it's the key.

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Reply by NikolaDzoniRisticAugust 23, 2019

I solved the problem with a pull up resistor. Thank you for your time and help.


This is a individual project. I am a Do It Yourself hobbyst. I have a degree in mechatronic ing. and live in a house with a garage full of tools. I simply like making automated stuff :)

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Reply by mr_banditAugust 23, 2019

Cool!

The Deamon Murphy has dictated we will have a problem that takes 3 days to solve, and they all boil down to a switch,or a line in a config file, or a checkbox. You found the "missing component" one.

You also might want to find a makerspace near you on hackerspaces.org. They might have a tool you don't have. Also, an interesting community of makes and other nerds.

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