Modeling and Performance evaluation of Embedded SystemStarted by 5 years ago●6 replies●latest reply 5 years ago●114 views
It's been long time I'm searching for the information about how to model and do performance evaluation of system with multiple computations units (CPU+FPGA+Microcontoller). All what I got is the hypothesis and theories (Y-chart, V-chart) but no real cases (Tools, examples). I want to understand what is good/best way to evaluate the performance of my system (by simulation or something else), understand the best way of partitioning of tasks between components and also including impact of memory (DRAM and SSD) and interfaces. Does anyone know good paper or book or tutorial where I can find these kind of information? Thank you very much for help.
Either I'm really behind the times, or you're doing some weird combination of outsmarting yourself and underestimating the amount of work it's going to take to do the estimation.
There are too many variables (in my humble opinion) to have some algorithm into which you can plug numbers and then get a good idea of what's going on for any arbitrary problem.
The way I've done this sort of thing is to make a candidate decomposition of the task, clearly identify what the computational goals are of each block, and the necessary communication from block to block. Then I estimate the load of each part (do NOT leave out the communications bits, or the overhead of memory access!). Then I add everything up.
Did you think about how you would evaluate the performance of a system with a single device? A tool such a Tracealyser from Percepio could be of help.
You can read about it here: https://percepio.com/tracealyzer/
You can use Enterprise Architect modelling a complete system level architecture, and for hardware level architecture you have to use Model sim for FPGA / ASIC simulation, as mentioned by Mark you can use Tracealyser for processor level simulation, and finally pspice or (LTspice) for analog level simulation.
A combination of all these will give you complete results, and you have to give proper inputs to get correct results. There can be several iterations.
You start from a minimum CPU + Memory + devices, on paper, start analyzing putting some figures for each of your target requirements, then you will come to a nearby realistic architecture that satisfies your needs. Then search for tools to simulate the lower end blocks may be in pSpice or LtSpice ensure that sensors actuators work well, with proper timing. Then start putting code, like one task for each event or monitoring, and then use a proper IDE and start implementing step by step. Then write a timer based scheduler to see all tasks at done in proper time and add this to the code. Everything may not work at first time. Use tracealyser or debug tools to fix those problems.
Ok, Geezer spouts old school: Real benchmarks are best done within the code you wrote. I use a simple bit/line toggling of/between locations I need metrics on. Yes, they DO affect the overall performance, but by a small amount, yet you can see general ops on an o'scope.
I've yet to encounter being too fast a problem (I can Always slow down).
If you're line bound, use one that doesn't pertain to that section.