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XGate programming and XDP512 memory scheme

Started by jpdi in 68HC1216 years ago 2 replies

Hello ! Until now, I was using mc9s12dp256 with ICC12 V6 professionnal, paged programm, and all was ok. Now, using mc9s12xdp512cal, with...

Hello ! Until now, I was using mc9s12dp256 with ICC12 V6 professionnal, paged programm, and all was ok. Now, using mc9s12xdp512cal, with ICC12 professionnal V6, I need to use XGate processor (communication SCI between 2 MCU). Without XGate, the main S12 CPU would be overload ! I read the Freescale datasheets, specially the chapters about : - XGate, - Memory Mapping Control - Interru...


I2C delay after each ACK on MC9S12DP256

Started by Chengrong Lu in 68HC1221 years ago 1 reply

My module is working as a slave receiver, my I2C ISR can be simplified as follows: void interrupt I2CISR(void) { IBIF = 1;...

My module is working as a slave receiver, my I2C ISR can be simplified as follows: void interrupt I2CISR(void) { IBIF = 1; bThisByte = IBDR; } After the last statement, the receiver sends out an ACK, and after this ACK, the MCU holds both SDA a


Metrowerks SmartLinker doesn't include Banked Flash code in S-Record generation

Started by phylacjoe in 68HC1221 years ago 1 reply

I've recently been studying M.Doughman's AN2153: Serial Bootloader for MC9S12DP256. It is stated that S-records generated by Cosmic...

I've recently been studying M.Doughman's AN2153: Serial Bootloader for MC9S12DP256. It is stated that S-records generated by Cosmic software works fine, but I'm on Metrowerks CodeWarrior, so... I had no problems installing the bootloader into the Protected High area (Starti


Re: Experience with J1850 and ISO9141

Started by Jean-Sebastien Bouchard in 68HC1218 years ago 1 reply

Both the MC9S12DP256 and the 68HC58 datasheets talk about the output to the J1850-VPW bus. What about the J1850PWM bus. My guess is that it...

Both the MC9S12DP256 and the 68HC58 datasheets talk about the output to the J1850-VPW bus. What about the J1850PWM bus. My guess is that it is just a matter of physical interface between the selected controller and the bus, right? Also, very little information may be found about the actual physical interface that is recommended to the J1850PWM bus. The SAE spec itself only discuss the tim...


Looking for reference design - HCS12 with external flash - expanded wide mode

Started by xeorok in 68HC1221 years ago 4 replies

Before I commit to a PCB I am looking for a couple of reference designs that work to check my design against !!!! I am using an ...

Before I commit to a PCB I am looking for a couple of reference designs that work to check my design against !!!! I am using an MC9S12DP256 microcontroller with an AM29F800B (512k byte X 16 bit wide) flash memory chip for external program memory. I want to be able to use the P&am


Problem compiling HC12 code to flash onto Wytec Minidragon

Started by thomasfong in 68HC1218 years ago 2 replies

Hello, I have a Wytec MC9S12DP256 MiniDragon Development board. I have written a simple program that uses the RTI interrupt to update...

Hello, I have a Wytec MC9S12DP256 MiniDragon Development board. I have written a simple program that uses the RTI interrupt to update the status of PORTM and the rest of the program waits and sends messages via the serial port (SCI0) to the computer and toggles the ports as necessary.=20=20 The code is fully debugged and works perfectly when using the board in EVB mode with the DBug12 ...


NOICE debugger / Axiom board / ICC12

Started by chil326 in 68HC1220 years ago 2 replies

Hello, i use icc12 with CML9S-12DP256 board from Axiom ( MC9S12DP256 MCU). I want to debug with noice debugger but i can't step...

Hello, i use icc12 with CML9S-12DP256 board from Axiom ( MC9S12DP256 MCU). I want to debug with noice debugger but i can't step the source file with it. The program runs until main, and then, when i want to step with NOICE debugger, it doesn't work because the program runs without