The 2024 Embedded Online Conference

MFRC522 Internal buffer

Started by rkdobh 5 years ago3 replieslatest reply 5 years ago110 views


I'm trying to understand how MFRC522 works and its procedures to read UID, authentication and so on, so I can write my own library for PIC etc. 

In its datasheet, item, the "Mem" command is said to store 25 bytes from FIFO buffer into the "internal buffer", but this "internal buffer" is not mentioned anywhere before this.

Does anyone know what is this "internal buffer"? How does it work?



[ - ]
Reply by MarkDSylvaMay 2, 2019

The internal 64 byte FIFO, which is what it appears that section is referring to is mentioned here on page 44: FIFODataReg register Input and output of 64 byte FIFO buffer. 

This is the datasheet I found it on:   https://www.nxp.com/docs/en/data-sheet/MFRC522.pdf

[ - ]
Reply by rkdobhMay 2, 2019

Thanks for replying. 

But it seems that there is another internal memory, because Mem Command says that it will transfer 25 bytes from this FIFO buffer that you show me to the "Internal Buffer". That's what I didn't get: There is the FIFO 64 bytes bufffer and another internal memory? I'm lost in this datasheet.

[ - ]
Reply by sreenivasa_charyMay 2, 2019

The data sheet is quite brief but i will try and explain what i understood.

The FIFO is the main interface for the host to send and receive data from the MFRC522. All the data that comes in from the host and goes to the RF analog portion, and vice versa, transits through this FIFO. It is basically there to act as a flow control block. The data is translated within the MFRCs other processing sections and these apparently have their own memory to process it - like encoding and decoding it for the journey over the air. And these memories are accessible only to the those respective blocks. The host does not have access to them. 

Doesn't this look somewhat akin to the double buffered graphics concept, the rendering buffer is different from the drawing buffer ? if the host accesses the rendering buffer it will disrupt what is on the display, hence it is protected.

So it appears that the "internal memory" referred to here is such an internal pipeline, which is fed and consumed by the encoding/decoding engines and is not designed to be accessed by the host. The said 'Mem' command is, in my understanding, used to flush 25 bytes at a time from and to the internal memory. 

As per the description of the Mem command:

if you fill the FIFO and send the Mem command, then 25 bytes will be transferred (written) to the internal memory and i presume the transmission will be started. 

And if you send the Mem command when the FIFO is empty, the 25 bytes in the internal memory will be transferred (read out) into the FIFO.

That is all that is evident from this datasheet, i think for further clarification, the command execution sequence, if available, would help greatly. 

The 2024 Embedded Online Conference