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This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).

Search Results for "webpack"

  

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Re: FreeBSD tools ?

Eric Smith - Jan 11 2005
Kathy wrote: > I am again thinking of going back to FreeBSD. > > I have my AVR stuff and I can buy a reasonable CAD package, but I have > no idea about FPGA too... Re: FreeBSD tools ?

WebPack 5.1 direct kink   [2 Articles]

Ed Corter - Jan 11 2003
I have recently noticed that Xilinx has changed the WebPACK download page: it now requires USER \ PWD login. I am not sure if you need to be a paying customer ... WebPack 5.1 direct kink

XSOC using latest Xilinx WebPack 6.2i

saibal_das - Sep 7 2004
Please let me know if there exist any information about using XSOC BETA 093 with Xilinx WebPack 6.2i such as how-to guide and project files ( *.npl ) Thanks,... XSOC using latest Xilinx WebPack 6.2i

Xilinx "Classics" S/W page

Brian Davis - Oct 19 2002
Xilinx has added a "Classics" software page that allows one to download old versions of Webpack, as well as ISE4.2 S/W to support 4KE/XL based design: h... Xilinx "Classics" S/W page

How to create .edn file in Webpack ?

rtfinch35 - Dec 26 2001
How to I create a .edn file in Webpack ? Thanks Rob ... How to create .edn file in Webpack ?

v6502   [4 Articles]

- Mar 9 2001
I started working on a verilog version of the 6502 processor yesterday. I handcrafted a state machine based on observations of opcode patterns and knowledge of th... v6502

Re: 6502 project

rtfinch35 - Dec 24 2001
Merry, Merry, Merry, Christmas! I have figured out the branch bug. I wasn't simulating the same code in ModelSim that I was trying to implement. Once I did that... Re: 6502 project

Catenation operator - another dumb question :-)   [3 Articles]

- Feb 6 2001
Could anyone tell me if the catenation operator {,,...} can be used on the LHS of an assignment ? The lines below (almost verbatim from the gr0000 module) won't... Catenation operator - another dumb question :-)

xsoc schematics in ISE WebPack

ts_oswald - Nov 30 2004
Hi - I'm somewhat new to the fpga world and have been using the Xilinx ISE WebPack version 6.2.03i with a Digilent D2FT board (Spartan XC2S300E). To exp... xsoc schematics in ISE WebPack

Re: Minimal starter's kit?   [2 Articles]

Leon Heller - Nov 21 2001
>From: Niall Dalton <> >Reply-To: >To: >Subject: [fpga-cpu] Minimal starter's kit? >Date: Tue, 20 Nov 2001 21:12:19 -0800 (PST) > >Hi all, > >I'm i... Re: Minimal starter's kit?

Re: Digilent's Nexys

Leslie - Apr 3 2007
Hi Manuel, et al. --- In f...@yahoogroups.com, "Manuel Toledo Quinones" wrote: > > Hi, > > I want to introduce myself as new member of the list, and take > advan... Re: Digilent's Nexys

free Xilinx FPGA dev tools on the way

Jan Gray - Oct 2 2000
"XILINX ADDS FPGA SUPPORT TO FREE WEB DESIGN TOOLS" See http://www.xilinx.com/prs_rls/webfpga.html: "Xilinx, Inc. today announced full support of the enti... free Xilinx FPGA dev tools on the way

New Project

- Feb 28 2001
Hello! Like many of you, I am new to designing a CPU and putting it into an FPGA. The CPU I will be developing will be a stack-based processor designed ... New Project

New Development Board from Insight

Will Cummings - Oct 25 2000
Jan, I thought this was relevant. Hope you don't mind my "advertising" our new board here. Will Insight To Announce New Virtex-E Development Board ... New Development Board from Insight

YARD-1A and WebPack XST   [2 Articles]

Brian Davis - Nov 12 2000
XST first impressions: I've spent a few nights with the latest Xilinx WebPack, the YARD-1A VHDL source, and my trusty code machete; last night, a "blink t... YARD-1A and WebPack XST

Need Synthesizer

Rob Finch - Jul 11 2004
I have a reasonably complex design that the Xilinx Webpack XST synthesizer hits a 2GB memory limit on then quits. Is there another freeely available synthesizer I... Need Synthesizer

queries on verilog

Gurjit Chadha - Mar 12 2001
From Where can i download Verilog Tutorial,( books ,Manuals, etc) , Sample Codes, test benchs and Training manual . I hv Webpack suite with me. regards, ... queries on verilog

Re: D-Latch vs Flip-flop   [3 Articles]

- Jun 17 2001
Thanks for the heads-up. I would not have found that problem until I tried to run things in hardware. I guess I'll have to rework my design a little bit. Does the... Re: D-Latch vs Flip-flop

Re: I want to buy FPGA and FPGA board   [2 Articles]

Tony Burch - Sep 1 2002
Hi Reala, Can I suggest the BurchED B5-Spartan2+ board, as a low cost way to get a large "300K gate" Xilinx device in a development system, which includes the ... Re: I want to buy FPGA and FPGA board

Strict P&R in Xilinx chips   [2 Articles]

Eric Laforest - Dec 2 2001
Is it possible to generate a design that is explicitely placed and routed? (ie: this reg goes here, uses these tristate lines up to here, etc...) I presume that ... Strict P&R in Xilinx chips

Re: FPGA Synthesis tool   [2 Articles]

rtstofer - Sep 7 2007
--- In f...@yahoogroups.com, Mukti Bansal wrote: > > Hi All, > > Can anyone suggest me a good FPGA synthesis tool to > use. > > Thanks, > Both Altera and X... Re: FPGA Synthesis tool

Re: Microblaze In FPGA Virtex4 ML401?

rtstofer - Jul 21 2007
--- In f...@yahoogroups.com, moraali_ali@... wrote: > > Good morning > > I have a project where I need to embed microcontroller in a Xilinx ML401.This project consist... Re: Microblaze In FPGA Virtex4 ML401?

Re: How about writing an FPGA processor with JHDL?

Jacob Nelson - Mar 25 2002
On Tue, 26 Mar 2002, Simon Gornall wrote: > Personally, the major reason for my limited development time with > FPGA's is that I have to reboot into Windows to d... Re: How about writing an FPGA processor with JHDL?

Re: 1:00 am designing.

Christian Plessl - Apr 10 2002
> I got Altera software for the 10K10 FPGA I am programing. I may go with > a 64 or 128? macrocell device but if I use JTAG configuration I want to > have all the i... Re: 1:00 am designing.

Re: Floating Point Arithmetic   [2 Articles]

Rob Finch - Oct 19 2004
> At some point, way down the line, I should implement floating point > math. The usual suspects: add, subtract, multiply, divide, sin, > Are there any free ... Re: Floating Point Arithmetic

Timing Constraints

rtstofer - Dec 22 2006
I'm working on a project with the Spartan 3 Starter Board and the Xilinx WebPack ISE version 8.2 As I look over the timing results, there are lengthy delays in the paths conta... Timing Constraints

Re: Spartan 3 Starter Kit?   [2 Articles]

Eric Smith - Dec 25 2004
> looking for opinions on the SP3 starter kit > they are offering at their web store for 99 bucks. > > Any comments, good or bad appreciated... It's a great ... Re: Spartan 3 Starter Kit?

Missing memory models ?

- Feb 4 2001
Hi all, I'm a complete beginner at FPGA, but I read Jans paper on his SoC and it seemed reasonably straightforward. I've bought one of the BurchED kits so I'... Missing memory models ?

RE: XSV Board

Will Cummings - Aug 3 2000
Hi Jamie, You can download free Verilog synthesis/simulation tools from Xilinx at http://www.xilinx.com/sxpresso/webpack.htm Will Cummings Xilinx D... RE: XSV Board

Re: Timings   [2 Articles]

- Oct 19 2001
--- In fpga-cpu@y..., Ed Corter wrote: > > > Please email me the info on what synhtesis tool and > what version of mapper / Place and rount is ... Re: Timings

Floorplanning and Webpack

Simon Gornall - Sep 22 2002
Hi all, After something of an enforced absence, I have some spare time to play with FPGA's again :-) Of course, I now have more problems... I've been playin... Floorplanning and Webpack

FPGA routing - was - RE: Re: POP-11 (PDP-11/40 in an FPGA)

rtstofer - Oct 17 2007
> Why does everybody assume Xilinx is the *only* brand of FPGA's. I used > Altera 10K. I certainly prefer the licensing terms for WebPACK ISE over the Altera equivalent. ... FPGA routing - was - RE: Re: POP-11 (PDP-11/40 in an FPGA)

New XR16 application

Felix Bertram - Nov 10 2001
Dear Developers, we just launched a new application note, implementing Jan Gray's XR16 CPU, a VGA character generator, glue logic and firmware in a single Xilinx... New XR16 application

Re: Suggestions re: Free Tools   [2 Articles]

Leon - Aug 24 2007
----- Original Message ----- From: rtstofer To: f...@yahoogroups.com Sent: Friday, August 24, 2007 3:49 PM Subject: [fpga-cpu] Suggestions re: Free Tools The problem with n... Re: Suggestions re: Free Tools

Suggestions re: Free Tools

rtstofer - Aug 24 2007
The problem with newbies such as myself is that not only don't they know anything, they don't even suspect! I have been using WebPack ISE for about 5 years and it has the adva... Suggestions re: Free Tools

How small a Forth machine can you make?

Mike Butts - Oct 31 2002
Slashdot brought up my old friend Forth today http://books.slashdot.org/books/02/10/27/211220.shtml?tid=156 Do you know it? Nothing better for small, fast, eleg... How small a Forth machine can you make?

Nios board ?   [2 Articles]

Alex Gibson - Sep 25 2004
Just wondering if anyone has seen or tried one of the future electronics NIOS kits http://www.futureelectronics.com/promos/cyclone/ Any comments on the... Nios board ?

Re: 1000K Gate Spartan 3 Starter Board Available

Jacob Nelson - Feb 11 2005
a 1000K gate Spartan 3 is a *very* useful device. I'd be happier if the board had 10x the external RAM, but it's a start. I did a design last year with a Spa... Re: 1000K Gate Spartan 3 Starter Board Available

ANN: 99.-EUR Low Cost FPGA Development System

Thorsten Trenz - Oct 1 2002
Hello all, the new low cost revision of our Spartan II Development System is now in stock. Prices start at 99.-EUR See: http://www.trenz-electronic.de/p... ANN: 99.-EUR Low Cost FPGA Development System

Altium Board ( was question regarding FPGA....)

Tony - Oct 15 2006
Yes, i saw that it expires and turns into a pumpkin, but im assuming webpack will work with the board, so its not a real big deal in the long run. I suppose i better v... Altium Board ( was question regarding FPGA....)
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