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This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).

Search Results for "yard-1a"

  

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Yet Another RISC Design (YARD-1A)   [7 Articles]

Brian Davis - Sep 19 2000
YARD-1A processor: I've been working on my own 32 bit RISC processor intermittently for the past year or so; it's not quite soup yet, but it's getting clos... Yet Another RISC Design (YARD-1A)

Summary of what's new at FPGA CPU News (www.fpgacpu.org)

Jan Gray - Sep 24 2000
00/09/24 Xilinx Student Edition 2.1i is shipping! 00/09/22 Site tweaked. Separate application CPUs for 3G phones. Xilinx acquires formal verification tools... Summary of what's new at FPGA CPU News (www.fpgacpu.org)

YARD-1A processor size

Brian Davis - Sep 25 2000
Hello all, Here's some information re. the YARD-1A processor size; slice counts are for the entire chip, including core, memory, and I/O ports. 16 bits :... YARD-1A processor size

Re: Re: YARD-1A Consts, CCs, Skips   [3 Articles]

Ben Franchuk - Sep 29 2000
Philip Freidin wrote: > > On Fri, 22 Sep 2000 02:39:20 -0000, you (Brian Davis) wrote: > >Philip, > > Is any of the RISC4005 stuff online? Hey I am having... Re: Re: YARD-1A Consts, CCs, Skips

Insight board (was Re: Yet Another RISC Design (YARD-1A))   [3 Articles]

Mike Butts - Sep 29 2000
Brian Davis wrote: > > When I first looked at the Insight board, I'd hoped to stick > an external synchronous SRAM on a daughtercard above the FPGA; > alas, in... Insight board (was Re: Yet Another RISC Design (YARD-1A))

GR0000 -- yet another simple FPGA CPU core, a work-in-progress

Jan Gray - Oct 22 2000
One evening last August, I sketched out the Verilog for a new, simpler RISC processor, simpler and smaller than xr16. (I mentioned this in http://www.egroups.com/... GR0000 -- yet another simple FPGA CPU core, a work-in-progress

YARD-1A and WebPack XST   [2 Articles]

Brian Davis - Nov 12 2000
XST first impressions: I've spent a few nights with the latest Xilinx WebPack, the YARD-1A VHDL source, and my trusty code machete; last night, a "blink t... YARD-1A and WebPack XST

How NOT to build variable width dual port Block RAMs   [2 Articles]

- Feb 5 2001
Hopefully, the following tale of how NOT to do something may save someone else a few nights of code rework... When moving the YARD-1A processor from the XC401... How NOT to build variable width dual port Block RAMs

YARD-1 tools snapshot   [2 Articles]

- Mar 20 2001
I'd posted some notes last month on using Spartan-II Block RAM as variable width dual port initialized RAM; I've since put together a snapshot of the YARD-1 a... YARD-1 tools snapshot

YARD-1 Testbench   [3 Articles]

- Nov 5 2001
I noticed the other day that it's been over a year since I first posted a description of the YARD-1 processor. In the event that anyone is wondering about its' s... YARD-1 Testbench

Re: PDP-11

Brian Davis - Oct 30 2002
Christopher McNabb wrote: > I got my PDP-11/24 (with 1024 MBytes ram, RA-80 120Meg drive > and 2 RL02 10Meg removable drives) for the cost of gas and > a hotel ro... Re: PDP-11