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The 2026 Embedded Online Conference

Beware of Analog Switch Leakage Current

Jason SachsJason Sachs June 27, 20251 comment

Leakage currents in analog switches can quietly wreck precision reference circuits at elevated temperature. Jason M. Sachs walks through three switch-topology implementations for a switchable 1.25 V reference and shows which topology gives the smallest worst-case output error using real part specs. He explains why op amp input bias is usually negligible and gives practical fixes: lower resistances, better switches, or limiting temperature range.


How to Analyze a Three-Op-Amp Instrumentation Amplifier

Jason SachsJason Sachs May 4, 2025

The three-op-amp instrumentation amplifier gives you high input impedance, improved net bandwidth, and much lower sensitivity to resistor mismatch than a single-op-amp differential stage. Jason M. Sachs walks through the algebra, numeric examples, and historical notes to show how the preamp isolates common-mode, why splitting gain boosts bandwidth, how overall gain can be set with one resistor, and what practical limits to watch.


How to Design Reliable Reset Circuits for Embedded Microcontrollers

Lance HarvieLance Harvie April 21, 2025

In the world of embedded systems, the reset circuit is a critical component that ensures the microcontroller starts up correctly and recovers gracefully from unexpected events like power fluctuations or software crashes. A poorly designed reset circuit can lead to erratic behavior, system lockups, or even permanent damage to the microcontroller. For embedded engineers, designing a reliable reset circuit is essential for ensuring the stability and robustness of the system.


Here Comes The Noise!

GLENN KirilowGLENN Kirilow July 10, 20241 comment

Noise. That awful thing which nobody wants that most sadly never learn about. It's time to change that with this blog post.


Turn It On Again: Modeling Power MOSFET Turn-On Dependence on Source Inductance

Jason SachsJason Sachs April 29, 2024

This is a short article explaining how to analyze part of the behavior of a power MOSFET during turn-on, and how it is influenced by the parasitic inductance at the source terminal. The brief qualitative reason that source inductance is undesirable is that it uses up voltage when current starts increasing during turn-on (remember, V = L dI/dt), voltage that would otherwise be available to turn the transistor on faster. But I want to show a quantitative approximation to understand the impact of additional source inductance, and I want to compare it to the effects of extra inductance at the gate or drain.


Modeling Gate Drive Diodes

Jason SachsJason Sachs March 11, 20241 comment

This is a short article about how to analyze the diode in some gate drive circuits when figuring out turn-off characteristics --- specifically, determining the relationship between gate drive current and gate voltage during turn-off of a power transistor.


Tolerance Analysis

Jason SachsJason Sachs May 31, 2020

Jason Sachs walks through practical tolerance analysis by designing a 24V overvoltage detector from the ground up, combining resistor tolerances, temperature coefficients, reference and comparator errors, hysteresis, and dynamic RC behavior. He demonstrates worst-case stacking with real datasheet numbers, shows how solder and mechanical stress affect resistor choice, and sizes filtering so the comparator meets a microsecond-range trip requirement. The article is a hands-on guide full of worked examples and trade-offs for embedded hardware engineers.


Wye Delta Tee Pi: Observations on Three-Terminal Networks

Jason SachsJason Sachs December 23, 2018

Three-terminal passive networks, wye, delta, tee, and pi, are more interchangeable than many engineers expect. Jason Sachs walks through Kennelly's wye-delta formulas, Z and Y matrix representations for tee and pi two-port networks, and worked examples ranging from balanced to highly skewed impedances. The post highlights practical payoffs, including using topology transforms to substitute hard-to-source capacitors with simpler, precision-friendly parts.


R1C1R2C2: The Two-Pole Passive RC Filter

Jason SachsJason Sachs July 28, 20181 comment

Jason Sachs walks through the math and simulation for the common two-pole passive RC filter, turning repetitive algebra into a compact reference you can reuse. He derives the closed-form transfer function, extracts the natural frequency and damping ratio, and explains why the topology cannot be underdamped without inductors or active stages. The post finishes with a state-space simulation recipe and practical component guidance.


The Other Kind of Bypass Capacitor

Jason SachsJason Sachs January 3, 20173 comments

Most engineers treat bypass capacitors as supply decoupling, but Jason Sachs digs into the other kind: a capacitor placed in the feedback path to tame unpredictable high-frequency plant behavior. He walks through real examples, Bode plots, and a simple RC model to show how the cap forces unity-gain feedback at high frequency, stabilizing switching regulators and wideband amplifiers while revealing the speed versus stability tradeoff.


R1C1R2C2: The Two-Pole Passive RC Filter

Jason SachsJason Sachs July 28, 20181 comment

Jason Sachs walks through the math and simulation for the common two-pole passive RC filter, turning repetitive algebra into a compact reference you can reuse. He derives the closed-form transfer function, extracts the natural frequency and damping ratio, and explains why the topology cannot be underdamped without inductors or active stages. The post finishes with a state-space simulation recipe and practical component guidance.


Two Capacitors Are Better Than One

Jason SachsJason Sachs February 15, 20155 comments

Jason Sachs revisits a simple stacked RC trick that dramatically reduces DC error from capacitor insulation leakage in long time-constant filters. Splitting one RC into two stages forces most of the DC drop onto the lower capacitor, squaring the remaining error while changing the effective pole locations. The post walks through the math, practical component tradeoffs, and when to prefer a digital approach.


Tolerance Analysis

Jason SachsJason Sachs May 31, 2020

Jason Sachs walks through practical tolerance analysis by designing a 24V overvoltage detector from the ground up, combining resistor tolerances, temperature coefficients, reference and comparator errors, hysteresis, and dynamic RC behavior. He demonstrates worst-case stacking with real datasheet numbers, shows how solder and mechanical stress affect resistor choice, and sizes filtering so the comparator meets a microsecond-range trip requirement. The article is a hands-on guide full of worked examples and trade-offs for embedded hardware engineers.


The Other Kind of Bypass Capacitor

Jason SachsJason Sachs January 3, 20173 comments

Most engineers treat bypass capacitors as supply decoupling, but Jason Sachs digs into the other kind: a capacitor placed in the feedback path to tame unpredictable high-frequency plant behavior. He walks through real examples, Bode plots, and a simple RC model to show how the cap forces unity-gain feedback at high frequency, stabilizing switching regulators and wideband amplifiers while revealing the speed versus stability tradeoff.


Stairway to Thévenin

Jason SachsJason Sachs December 31, 2011

Jason Sachs strips away classroom mystique to show how Thevenin and Norton equivalents are practical tools for real embedded work. Using a simple two-terminal black-box example he shows how two measurements give Vth and Rth, then applies that model to voltage-divider references, potentiometer RC filters, and combining multiple sources with Millman's theorem. Read it for fast, practical ways to predict output impedance, droop, and filter time constants.


Optimizing Optoisolators, and Other Stories of Making Do With Less

Jason SachsJason Sachs December 14, 20144 comments

Jason Sachs digs into how to squeeze speed and reliability from low-cost optoisolators, showing practical tweaks that often outperform default datasheet usage. He mixes hands-on circuits — using 4N35 base-emitter resistors, Schottky clamps, input speedup caps, and output buffering — with transistor-switching theory and a cautionary production story to show when to optimize and when to splurge on pricier isolators.


How to Analyze a Differential Amplifier

Jason SachsJason Sachs April 13, 2014

Jason Sachs walks through the algebra and intuition behind the classic four-resistor differential amplifier. He derives the exact output equation, isolates error terms from resistor mismatch and op-amp imperfections, and explains why common-mode gain depends on mismatch not on the differential gain. Read this for clear formulas, modal insight into common-mode versus differential-mode, and practical steps to reduce offsets in real designs.


Metal detection: beat frequency oscillator

Fabien Le MentecFabien Le Mentec January 30, 20161 comment

Fabien Le Mentec walks through a practical beat frequency oscillator metal detector, from the LC oscillator theory to the Arduino-based frequency counter. He shows how changes in coil inductance reveal nearby metal, and why capacitor choice matters when you want a stable detector. The post focuses on the BFO sensing stage, with enough detail to help you build and test one yourself.


Isolated Sigma-Delta Modulators, Rah Rah Rah!

Jason SachsJason Sachs April 25, 2013

Analog isolation can blow up DAQ budgets, but isolated sigma-delta modulators let you send a single 1-bit stream and a clock across the barrier, keeping costs down. Jason walks through Avago, TI, and Analog Devices parts, explains sigma-delta noise shaping in plain terms, and calls out the real engineering work: converting a 10–20 MHz bitstream into usable samples with sinc/CIC decimators or FPGA filtering.


Have You Ever Seen an Ideal Op-Amp?

Jason SachsJason Sachs April 30, 2012

Forget the ideal op-amp fantasy, Jason Sachs walks through the practical nonidealities that make textbook gain formulas fail in real circuits. Using the uA741C and TLC081C as examples, he explains offset voltage, input bias and offset currents, common-mode and supply rejection, gain-bandwidth and slew-rate limits, plus capacitive loading, RF rectification and overload recovery. Read to learn which datasheet specs matter and why.


The 2026 Embedded Online Conference