An Engineer's Guide to the LPC2100 Series
●7 commentsThis book is intended as a hands-on guide for anyone planning to use the Philips LPC2000 family of microcontrollers in a new design. It is laid out both as a reference book and as a tutorial. It is assumed that you have some experience in programming microcontrollers for embedded systems and are familiar with the C language. The bulk of technical information is spread over the first four chapters, which should be read in order if you are completely new to the LPC2000 and the ARM7 CPU.
Choosing An Ultralow-Power MCU
This application report describes how to compare ultralow-power MCUs. It discusses the key differences between popular low-power MCUs and how to interpret features and specifications and apply them to application requirements
Interrupts, Low Power Modes and Timer A
This document contains a lot of what you need to know to get the most out of the MSP430. The MSP430 line is renowned for it's low power usage, and to really utilize it well you have to architect your software to be an interrupt driven device that utilizes the low power modes.
PID Without a PhD
●8 commentsPID (proportional, integral, derivative) control is not as complicated as it sounds. Follow these simple implementation steps for quick results.
Reed-Solomon Error Correction
[Best paper on Reed-Solomon error correction I have ever read -- and it's from the BBC!] Reed-Solomon error correction has several applications in broadcasting,in particular forming part of the specification for the ETSI digital terrestrial television standard, known as DVB-T. Hardware implementations of coders and decoders for Reed-Solomon error correction are complicated and require some knowledge of the theory of Galois fields on which they are based. This note describes the underlying mathematics and the algorithms used for coding and decoding,with particular emphasis on their realisation in logic circuits. Worked examples are provided to illustrate the processes involved.
Memory allocation in C
●5 commentsThis article is about dynamic memory allocation in C in the context of embedded programming. It describes the process of dynamically allocating memory with visual aids. The article concludes with a practical data communications switch example which includes a sample code in C.
Advanced Linux Programming
●6 commentsThis book is intended for learning advanced linux programming.
Red Hat Linux - The Complete Reference
This book identifies seven major Linux topics: basic setup, environments and applications, the Internet, servers, administration, and network administration. These topics are integrated into the different ways Red Hat presents its distribution: as a desktop workstation, network workstation, server, and development platform
Essential Linux Device Drivers
●5 commentsThis book is about writing Linux device drivers. It covers the design and development of major device classes supported by the kernel, including those I missed during my Linux-on-Watch days. The discussion of each driver family starts by looking at the corresponding technology, moves on to develop a practical example, and ends by looking at relevant kernel source files. Before foraying into the world of device drivers, however, this book introduces you to the kernel and discusses the important features of 2.6 Linux, emphasizing those portions that are of special interest to device driver writers.
CPU Memory - What Every Programmer Should Know About Memory
●6 commentsAs CPU cores become both faster and more numerous, the limiting factor for most programs is now, and will be for some time, memory access. Hardware designers have come up with ever more sophisticated memory handling and acceleration techniques–such as CPU caches–but these cannot work optimally without some help from the programmer. Unfortunately, neither the structure nor the cost of using the memory subsystem of a computer or the caches on CPUs is well understood by most programmers. This paper explains the structure of memory subsystems in use on modern commodity hardware, illustrating why CPU caches were developed, how they work, and what programs should do to achieve optimal performance by utilizing them.
What’s a Multicore Microcontroller?
This tutorial answers the question “What’s a multicore microcontroller?”
Software Development for Parallel and Multi-Core Processing
●1 commentThe embedded software industry wants microprocessors with increased computing functionality that maintains or reduces space, weight, and power (SWaP). Single core processors were the key embedded industry solution between 1980 and 2000 when large performance increases were being achieved on a yearly basis and were fulfilling the prophecy of Moore's Law. Moore's Law states that "the number of transistors that can be placed inexpensively on an integrated circuit doubles approximately every two years." With the increased transistors, came microprocessors with greater computing throughput while space, weight and power were decreasing. However, this 'free lunch' did not last forever. The additional power required for greater performance improvements became too great starting in 2000. Hence, single core microprocessors are no longer an optimal solution.
Design and Implementation of the lwIP Stack
LwIP is an implementation of the TCP/IP protocol stack. The focus of the lwIP stack is to reduce memory usage and code size, making lwIP suitable for use in small clients with very limited resources such as embedded systems. In order to reduce processing and memory demands, lwIP uses a tailor made API that does not require any data copying. This report describes the design and implementation of lwIP. The algorithms and data struc- tures used both in the protocol implementations and in the sub systems such as the memory and bu®er management systems are described. Also included in this report is a reference manual for the lwIP API and some code examples of using lwIP.
Driving I2C-Bus Signals Over Twisted Pair Cables with PCA9605
The availability of powerful I2C buffers that drive their I/Os on both sides to a nominal ground or ‘zero offset’ logic level allows the removal of noise introduced into one section of a larger bus system. That ‘regeneration’ of clean I2C signals enables building long I2C buses by combining together relatively short bus sections, each say less than 20 meters, using such buffers or multiplexers that contain them. Conventional twisted pair communication cabling with its convenient connectors, and a ‘modular’ I2C system approach, make large system assembly easy. Each drop point or node can be individually selected for bidirectional data communication with the Master just by using normal I2C software addressing. As an example, a system is described for control of LED lighting displays and it is suggested that the power for the LEDs, and the I2C control system, might be economically provided using ‘extra low voltage’ distribution at 48 V using either the control signal cable or similar low cost wiring in a manner similar to that used in ‘Power over the Ethernet’ systems. The simplicity and flexibility of this approach makes it attractive to consider as an alternative to other control systems such as RS-485 or CAN bus.
Consistent Overhead Byte Stuffing
Byte stuffing is a process that transforms a sequence of data bytes that may contain ‘illegal’ or ‘reserved’ values into a potentially longer sequence that contains no occurrences of those values. The extra length is referred to in this paper as the overhead of the algorithm. To date, byte stuffing algorithms, such as those used by SLIP [RFC1055], PPP [RFC1662] and AX.25 [ARRL84], have been designed to incur low average overhead but have made little effort to minimize worst case overhead. Some increasingly popular network devices, however, care more about the worst case. For example, the transmission time for ISM-band packet radio transmitters is strictly limited by FCC regulation. To adhere to this regulation, the practice is to set the maximum packet size artificially low so that no packet, even after worst case overhead, can exceed the transmission time limit. This paper presents a new byte stuffing algorithm, called Consistent Overhead Byte Stuffing (COBS), that tightly bounds the worst case overhead. It guarantees in the worst case to add no more than one byte in 254 to any packet. Furthermore, the algorithm is computationally cheap, and its average overhead is very competitive with that of existing algorithms.
An Introduction to programming an Atmega microcontroller
●2 commentsThis document an introduction into the programming of an Atmega microcontroller. It is separated into the fi rst part guiding like a tutorial for beginners and a second part which is a reference book to the functions provided in the basis. The examples and explanations provided are neither exhaustive nor complete. The only aim of this document is to lower the burden of getting started. Only a basic knowledge in C is required.
Introduction to Embedded Systems
This is the first chapter in the book Embedded Systems Hardware for Software Engineers.
Boosting Performance Oscilloscope Versatility, Scalability Whitepaper
Rising data communication rates are driving the need for very high-bandwidth real-time oscilloscopes in the range of 60-70 GHz. These instruments are essential for validating and debugging new designs in coherent optical modulation analysis, high energy physics research, high speed data communications and other areas. With the DPO70000SX Performance Oscilloscope series, Tektronix delivers real-time signal acquisition with an ultra-high bandwidth of 70 GHz, along with a real-time sample rate of 200 GS/s (5ps/sample resolution), making it ideal for such applications.
Improving Battery Management System Performance and Cost with Altera FPGAs
The purpose of this white paper is to evaluate improvements to Battery Management System (BMS) performance and cost with Altera® FPGAs. In many high-voltage battery systems, including electric vehicles, grid attached storage and industrial applications, the battery is a significant portion of the system cost, and needs to be carefully managed by a BMS to maximize battery life and to optimize charging and discharging performance. This white paper presents the BMS functional requirements for these applications and outlines existing BMS architectures. Key BMS architectural challenges are discussed and opportunities for Altera devices are identified. For each of these opportunities, the performance and cost of the existing solution are compared with Altera FPGA solutions. Altera devices provide architectural flexibility, scalability, customization, performance improvements, and system cost savings in BMS applications.
New Life for Embedded Systems in the Internet of Things
The Internet of Things (IoT) is no longer a fanciful vision. It is very much with us, in everything from factory automation to on-demand entertainment. Yet by most accounts, the full potential of interconnected systems and intelligent devices for changing the way we work and live has barely been tapped. Up until now, IoT software solutions have largely had to be built from scratch with a high degree of customization to specific requirements, which has driven up the cost and complexity of development and deterred many prospective entrants to the market. What have been missing are developer tools that alleviate the costs associated with building the foundational infrastructure—the “plumbing” of their solutions—so they can focus on optimizing the core functionality and bring solutions to market more quickly with less cost. Wind River® is addressing these challenges with new solutions that have the potential to expand the market for IoT by reducing the cost and complexity of development. This document outlines the challenges that IoT poses for developers, and how Wind River solutions can help overcome them.
