display an image on VGA monitor

Started by bulub in FPGA-CPU14 years ago 2 replies

Dear all, Did anybody use the vga generator example for XS40 boards on www.xess.com before? Is that ready for use? I...

Dear all, Did anybody use the vga generator example for XS40 boards on www.xess.com before? Is that ready for use? I would like to read data from the SRAM and output the image on the VGA monitor. What should I do to the SRAM such that I can write data to it and


1000K Gate Spartan 3 Starter Board Available

Started by rtstofer in FPGA-CPU14 years ago 7 replies

I just got off the phone with Digilent and apparently the 400K and 1000K Spartan 3 boards are availabel and shipping now. ...

I just got off the phone with Digilent and apparently the 400K and 1000K Spartan 3 boards are availabel and shipping now. Maybe $120 for 400K and $160 for 1000K It is supposed to be on the web site but I haven't seen it.


A bit of history

Started by veronica_merryfield in FPGA-CPU14 years ago 15 replies

Mostly. This is neat http://news.com.com/Hobb yist+reconstructs+Apollos+computer/2100- 1003_3-5570963.html?tag=nefd.top...

Mostly. This is neat http://news.com.com/Hobb yist+reconstructs+Apollos+computer/2100- 1003_3-5570963.html?tag=nefd.top and so are some of the links from


Recommendation Of Logic Level Translator

Started by rtstofer in FPGA-CPU14 years ago 2 replies

I have just about finished building a 32 channel logic analyzer using a Spartan IIE FPGA. The analyzer works and the VB...

I have just about finished building a 32 channel logic analyzer using a Spartan IIE FPGA. The analyzer works and the VB application is essentially complete. The thing is, I don't want to dedicate my relatively expensive II E to the task. I want to port the application to t


Experiences with the Altera UP3-board and NiosII

Started by Mats Brorsson in FPGA-CPU14 years ago 3 replies

Hi, I was wondering if anyone has experiences using the Altera UP3-board with NiosII? Any comments are welcome. I'm looking...

Hi, I was wondering if anyone has experiences using the Altera UP3-board with NiosII? Any comments are welcome. I'm looking for an educational board suitable for microprocessor designs and this seems to have the right peripherals.


New to FPGA development

Started by sirtiffguy in FPGA-CPU14 years ago 15 replies

Hey guys (newby here), I am looking for a cheep development board with a few cool additions on it. My sole reason (one...

Hey guys (newby here), I am looking for a cheep development board with a few cool additions on it. My sole reason (one of them anyway) is to move from coding that we do in class (3rd year, EE) to the actual development of home projects that I can keep.


vmebus master softcore - reg

Started by kannaiah badam in FPGA-CPU14 years ago 5 replies

Hello to all the fpga designers we are planning to design Motorola Power PC8260 based 200 Mhz, cpu board on VME bus. we would...

Hello to all the fpga designers we are planning to design Motorola Power PC8260 based 200 Mhz, cpu board on VME bus. we would like to use vmebus master in a fpga. Earlier designs used VIC068, CYPRESS. Now, we would like to switch to softcore. we have searched the net and


OT: verilog arrays

Started by Rob Finch in FPGA-CPU14 years ago 2 replies

Does anyone know how to pass arrays to a module in Verilog ? I tried this as a test but it doesn't work: module...

Does anyone know how to pass arrays to a module in Verilog ? I tried this as a test but it doesn't work: module arrayTest(s, a, o); input [2:0] s; input [3:0] a [4:0]; // this line cause the synthesizer to croak with an error 'expecting ; not [ ' output [3


Re: why FPGA?

Started by Jeff Brower in FPGA-CPU14 years ago 3 replies

Eric- > > I just ripped the 220 Rs out of a Mini PCI design and found enough > > board space for switches. > > Austin...

Eric- > > I just ripped the 220 Rs out of a Mini PCI design and found enough > > board space for switches. > > Austin wrote: > > P.S. BTW, are you making a 5V only, or a "universal" card (3.3V and 5V)? > > MiniPCI is


Java JTAG API

Started by Kolja Sulimma in FPGA-CPU14 years ago 5 replies

I found the Java JTAG API that I was talking about. It is called JavaScan and has been withdrawn. ...

I found the Java JTAG API that I was talking about. It is called JavaScan and has been withdrawn. http://www.jcp.org/en/jsr/detail?id=2 (inkludes example source code to program a XC9500) There is a HAL that allows to efficien


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