open support question to Xilinx. should be fairly simple to answer.

Started by Antti Lukats in comp.arch.embedded12 years ago 1 reply

Hi Dear Xilinx and users of Xilinx FPGA devices, Q: is it possible to use: 1) Xilinx ISE/EDK 7.1 all latest service packs 2) Xilinx...

Hi Dear Xilinx and users of Xilinx FPGA devices, Q: is it possible to use: 1) Xilinx ISE/EDK 7.1 all latest service packs 2) Xilinx platform usb cable (pld updated by impact 7.1) 3) target device Xilinx V4 LX25 4) EDK XMD (I think I tried all variants of them!) All the above are Xilinx latest and greatest! To my understanding its not possible to get them to work, XMD fails to conne...


fpga and the particular case of xilinx

Started by sam in comp.arch.embedded7 years ago 2 replies

hiya in the particular case of fpga and the collaboration with xilinx remote monitoring, we could try to integrate the flow control of the...

hiya in the particular case of fpga and the collaboration with xilinx remote monitoring, we could try to integrate the flow control of the xilinx using centers of excellence. as a drawback i think that we could develop the recovery of the xilinx accurately. as a result when troubleshooting fpga and the concept of xilinx authorization, it might be better to increase the footprint of the ...


ESP8266 based Xilinx Virtual Cable server?

Started by Wojciech M. Zabolotny in comp.arch.embedded2 years ago 2 replies

Hi, I often need to access the debugged FPGA boards remotely. Now when Xilinx has made its Xilinx Virtual Cable specification...

Hi, I often need to access the debugged FPGA boards remotely. Now when Xilinx has made its Xilinx Virtual Cable specification available: http://www.xilinx.com/products/intellectual-property/xvc.html https://github.com/Xilinx/XilinxVirtualCable and when it is included in the newer versions of Vivado suite: http://forums.xilinx.com/t5/General-Technical-Discussion/XVC-Protocol-Support-In-Vi...


unable to suspend process xilinx

Started by Greg in comp.arch.embedded9 years ago

Hello, I am using the Xilinx Xilkernel on one of their demo boards and am currently getting an error. The error happens sometimes...

Hello, I am using the Xilinx Xilkernel on one of their demo boards and am currently getting an error. The error happens sometimes within seconds and sometimes within minutes of running my code. The error states that XMK can not suspend the process. This error can be seen in sched.c provided by Xilinx. I have no idea why this is happening. A Xilinx tech asked me to attempt turning on ex...


Are Xilinx Virtex-5 FPGAs really available?

Started by Anonymous in comp.arch.embedded11 years ago 4 replies

The Xilinx Virtex-5 FPGAs show up in Xilinx's website, but not in any of the distributors. The development boards are promised "June 2006",...

The Xilinx Virtex-5 FPGAs show up in Xilinx's website, but not in any of the distributors. The development boards are promised "June 2006", and you can leave an email address to be notified when they are truly available.


How to generate a signal on Xilinx Spartan II

Started by Rakesh Sharma in comp.arch.embedded13 years ago 4 replies

Hi, I wish to generate a frequency of approx 400 Hz using Xilinx Spartan II(200 MHz)and send the 1 bit signal to a speaker output and hope...

Hi, I wish to generate a frequency of approx 400 Hz using Xilinx Spartan II(200 MHz)and send the 1 bit signal to a speaker output and hope to hear some noise. My VHDL code, tested on PeakVHDL simulator does generate the waveform and is pasted at the far bottom. The problem is that the code does not compile on Xilinx because "WAIT for 2.5 ns" is not supported on Xilinx Spartan II for...


Xilinx VSK (Video Starter Kit)

Started by dakkumar in comp.arch.embedded11 years ago

I would like to exchange information on the Xilinx VSK with others using the kit. In particular I have the following observations: A1. The...

I would like to exchange information on the Xilinx VSK with others using the kit. In particular I have the following observations: A1. The VSK provides no help to people who do not wish to invest in (a) Matlab, (b) Simulink, (c) ISE 8.1, and (d) an MXE version compatible with 8.1. VSK assumes that anyone buying VSK will also buy these packages, or has them already. A2. Xilinx should s...


problem with using Signal with Xilinx

Started by Greg in comp.arch.embedded10 years ago 2 replies

I am using the Xilinx Kernel for the Xilinx FPGA core. I am attempting to use the Signal catch to send a packet out once every second on a...

I am using the Xilinx Kernel for the Xilinx FPGA core. I am attempting to use the Signal catch to send a packet out once every second on a ping. I included the signal.h and unistd.h files but when I call alarm to try and trigger a signal each second the compiler complains. The errors are as follows. /cygdrive/c/DOCUME~1/s262256/LOCALS~1/Temp/ccikIBdx.o: In function `sig_alrm': /cygdriv...


Chip information - Xilinx? 17s200apc

Started by chess in comp.arch.embedded12 years ago 1 reply

Hi, I am looking for information of a chip labled "17s200apc" on it. It seems from xilinx (from company mark), but i couldn't find it...

Hi, I am looking for information of a chip labled "17s200apc" on it. It seems from xilinx (from company mark), but i couldn't find it on their website, strangly. Google search also pointed out several stock information, just saying it is from xilinx. No documents, no descriptions at all. Any idea? Chandria Embossi


Xilinx PowerPC & MicroBlaze Development Kit

Started by czeczek in comp.arch.embedded11 years ago 5 replies

Hi, Is there anyone who knows where can I buy XIlinx PowerPC & MicroBlaze Development Kit in european union ??...

Hi, Is there anyone who knows where can I buy XIlinx PowerPC & MicroBlaze Development Kit in european union ?? (DO-ML403-EDK-ISE, http://www.xilinx.com/xlnx/xebiz/designResources/ip_product_details.jsp?sGlobalNavPick=PRODUCTS& sSecondaryNavPick=Intellectual+Property&category=&iLanguageID=1&key=DO-ML403-EDK-ISE ) I tried via XIlinx on-line store but since their products are not RoHS compliant


problem with xilinx platform studio 6.2i

Started by Ram in comp.arch.embedded13 years ago 1 reply

Hello, I'm working on a simple hardware design lab - Microblaze.When I start a new project with BSB in Xilinx Platform Studio(XPS)and...

Hello, I'm working on a simple hardware design lab - Microblaze.When I start a new project with BSB in Xilinx Platform Studio(XPS)and select target development board I face a problem. The board which I have is Spartan-3 and the lab exercise is based on Spartan-3. But the software(XPS) 6.2i which i have in system does'nt show all the xilinx board names. When i select Xilinx in the board vendor...


In-Circuit programming of XC9500XL with PIC18F

Started by Rob Young in comp.arch.embedded12 years ago 1 reply

I'm interested to know if anyone has successfully programmed a Xilinx XC9500XL CPLD with a PIC18F using the Xilinx JTAG/TAP port. I've been...

I'm interested to know if anyone has successfully programmed a Xilinx XC9500XL CPLD with a PIC18F using the Xilinx JTAG/TAP port. I've been reading Xilinx app note 058 and it looks feasible. The inbound data stream (SVF or XSVF file) would be coming into the PIC18F via a USB connection. This is for the purposes of occasional field-upgrades, not the frequent reconfigurations you would h...


Xilinx struct timeval redefined

Started by Anonymous in comp.arch.embedded10 years ago

I am trying to write code for the Xilinx Kernel provided for a Xilinx FPGA. I am attempting to write a ping utility for said platform. ...

I am trying to write code for the Xilinx Kernel provided for a Xilinx FPGA. I am attempting to write a ping utility for said platform. In trying to use "lwip/sockets.h" I receive a message from the compiler telling me that I am redefining struct timeval in the sockets.h file. I took a look at the automatically generated sockets.h file and the timeval structure is indeed created and probably...


Implementing Microblaze in Xilinx Virtex4 (ML401) ?

Started by moraali in comp.arch.embedded10 years ago 2 replies

Good morning I have a project where I need to embed microcontroller in a Xilinx ML401.This project consist a GSM which connect to...

Good morning I have a project where I need to embed microcontroller in a Xilinx ML401.This project consist a GSM which connect to a microcontroller(ATMEGA8535) and the microcontroller is eventually connected to Xilinx Virtex4 (ML401).It is actually road traffic light implementation for Emergency Vehicle Preemption System. My friend told me that I could do this by implementing a Microbl...


power consumption of integrated circuit in 0.13Ám CMOS technology

Started by Geronimo Stempovski in comp.arch.embedded4 years ago 5 replies

Hi all, currently I am investigating a data sorting algorithm on hardware. The algorithm was implemented in VHDL and is currently running on...

Hi all, currently I am investigating a data sorting algorithm on hardware. The algorithm was implemented in VHDL and is currently running on a Xilinx Virtex-II Pro XC2VP70 - FF1704 FPGA. Power consumption is a crucial aspect in the target application. Therefore I made an analysis with the Xilinx Virtex-II Pro Web Power Tool (www.xilinx.com) and obtained satisfying results. Now I'd ...


Xilinx FPGA Not Being Recognized by ISE

Started by lambdanator in comp.arch.embedded8 years ago 1 reply

Hello Everyone, I have a Sparkfun Xilinx FPGA Breakout Revision 2.2 with Support Circuitry(this one...

Hello Everyone, I have a Sparkfun Xilinx FPGA Breakout Revision 2.2 with Support Circuitry(this one here: http://www.sparkfun.com/commerce/product_info.php?products_id=8458) and a Digilent UBS-JTAG Programmer Cable(this one: http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,395,716&Prod=XUP-USB-JTAG). I have never programmed the Xilinx FPGA before, as I just recieved the programmer t...


mb-gnutools

Started by alb in comp.arch.embedded3 years ago

Hi everyone, we have a modified microblaze (mblite) on top of which we added an fpu and everything is implemented in an FPGA. I'm now facing...

Hi everyone, we have a modified microblaze (mblite) on top of which we added an fpu and everything is implemented in an FPGA. I'm now facing the issue to generate a toolchain for this platform [1] and I have some doubts on how to proceed. First I'd like to say that I haven't found a single one release from Xilinx that I can potentially rely on. Several Xilinx webpages point to a ve...


Z-turn board, anyone use Xilinx ZYNQ-7000?

Started by Mei Zhang in comp.arch.embedded2 years ago 1 reply

The Z-turn board is an ultra low-cost single board computer for the Xilinx Zynq-7010 or Zynq-7020 SoC which is featuring integrated dual-core ARM...

The Z-turn board is an ultra low-cost single board computer for the Xilinx Zynq-7010 or Zynq-7020 SoC which is featuring integrated dual-core ARM Cortex-A9 processor with Xilinx 7-series Field Programmable Gate Array (FPGA) logic. Z-turn with 7010 only USD99/pc Z-turn with 7020 only USD119/pc http://www.myirtech.com/list.asp?id=502


USB3300 - Xilinx ML401 interface ...

Started by zubinkumar in comp.arch.embedded8 years ago

Hi, I wanted to send some data from the USB port of my computer to the Xilinx ML401 board via the USB3300 card. My restriction is that I cannot...

Hi, I wanted to send some data from the USB port of my computer to the Xilinx ML401 board via the USB3300 card. My restriction is that I cannot use the MircoBlaze package. When I connect the USB3300 to the Xilinx board and then to the USB port of my computer, I donot get a VID and PID. I wanted to know if I need some kind of VHDL code/core running on the ML401 initially that activates the USB3300...


FPGA starting kit

Started by Nitron in comp.arch.embedded13 years ago 6 replies

Hi, I'm starting on FPGAs. How about Xilinx Spartan 3 starter kit?. It's any better under...

Hi, I'm starting on FPGAs. How about Xilinx Spartan 3 starter kit?. It's any better under $200. http://www.xilinx.com/products/spartan3/s3boards.htm Best regards, Rodrigo.