Flash-cells can be used as downcounters - ?

Started by karthikbg in comp.arch.embedded11 years ago 13 replies

Hi, I came across something as below while i was looking for downcounters. And this is really interesting !! " Downwriting is possible in...

Hi, I came across something as below while i was looking for downcounters. And this is really interesting !! " Downwriting is possible in Flash Memory . Flash-Cells are proberly usable as downcounters. Start with bytewise "FF" and ure able to reprogram this flash-cell with every value that means not to bring a flash-data-BIT from "0" to "1". " How is it possible to make the Flash mem...


Flash emulators ...

Started by JSambrook in comp.arch.embedded11 years ago 11 replies

Hello, I'm looking for a flash emulator that will support the 64MB P33 NOR flash from Intel, part # RC48F4400P0TB00 (leaded)...

Hello, I'm looking for a flash emulator that will support the 64MB P33 NOR flash from Intel, part # RC48F4400P0TB00 (leaded) or PC48F4400P0TB00 (lead free). By flash emulator, I mean an active device that can take the place of the flash part in circuit, uses RAM to emulate the flash memory, and has an ethernet or USB connection to make reloading the memory significantly faster than rep...


Read from flash with AT91SAM7S64

Started by Andy in comp.arch.embedded12 years ago 4 replies

Hello, I have an application where I will have a LCD display with several menus and so I will want to have lots of const arrays of text...

Hello, I have an application where I will have a LCD display with several menus and so I will want to have lots of const arrays of text stored in flash. Does anyone know if you can read from internal flash memory, (i.e. access constants stored in flash) with a Atmel AT91SAM7S64? Someone was telling me there is no way to read from internal flash while executing code from the flash on thi...


Serial Flash Protected Area

Started by Vladimir Vassilevsky in comp.arch.embedded10 years ago 2 replies

Is there any reason why the SPI flash chips always have the protected area in the upper addresses at the end of the available memory? ...

Is there any reason why the SPI flash chips always have the protected area in the upper addresses at the end of the available memory? All of the CPUs that I know start booting from the SPI flash by reading some information which begins at the address 0. So if the beginning of the flash gets corrupt, then the CPU is dead and we can't reprogram the flash by software. Therefore it se...


Querys regarding Flash File system

Started by ssubbarayan in comp.arch.embedded9 years ago 7 replies

Dear all, I am new to flash file system.Can some one point me to some basics regarding flash file system?I am not aware whats flash...

Dear all, I am new to flash file system.Can some one point me to some basics regarding flash file system?I am not aware whats flash file system and the need for it?Also it will be helpful if someone could let me know about design aspects of flash file system. Our customer has given requirement to have one on the flash. I googled web,but did not find anything relevant to the basics...


Atmel flash memory issue, maybe?

Started by Vishnu Swaminathan in comp.arch.embedded11 years ago 4 replies

Hello folks, I am using Atmel flash AT49BV322DT in a custom dsp board i am building. the dsp is a TI 320DM641. I have written test software...

Hello folks, I am using Atmel flash AT49BV322DT in a custom dsp board i am building. the dsp is a TI 320DM641. I have written test software that erases, writes and reads from the flash. When I send the sequence of erase commands to the flash, I am able to see write signals on the scope. Shortly thereafter, I also see the Ready/Busy/ output from the flash go low, as expected. Same thing w...


Testing NVRAM and FLASH-Need a test strategy

Started by s.subbarayan in comp.arch.embedded13 years ago 2 replies

Dear gurus, Can you advice me how to test FLASH and NVRAM Memory using C language?I am not aware what should be the methodology I must...

Dear gurus, Can you advice me how to test FLASH and NVRAM Memory using C language?I am not aware what should be the methodology I must be using.Further,for testing the flash,do i need flash programmer?Or what hardware setup is required to test NVRAM and FLASH?Typically My h/w has got a NVRAM and a flash and I am asked to develop some software based on C language to test these Mem chips.Ne...


reducing flash size in embedded processors?

Started by booth multiplier in comp.arch.embedded13 years ago 75 replies

Dear All, Two years I attended a Hitachi Embedded Seminar. They presented their embedded low power Flash microcontrollers there. The Presenter...

Dear All, Two years I attended a Hitachi Embedded Seminar. They presented their embedded low power Flash microcontrollers there. The Presenter said: " If you look to the die you'll see that the cpu is only a small fraction and the flash part occupies much of it. Especially if the flash size is > 32k." If this is real why don't they change the architecture to save some flash size? Any Comm


Writing to Flash

Started by Tom Lucas in comp.arch.embedded12 years ago 5 replies

I am trying to write to the Flash on a Logic PD Development Kit using a Sharp LH79524 to write to a Sharp LH28F128SPHTD. I know the hardware is...

I am trying to write to the Flash on a Logic PD Development Kit using a Sharp LH79524 to write to a Sharp LH28F128SPHTD. I know the hardware is fine because I can program the flash using a debugger and code happily runs from it. The flash uses the CFI interface and writing 0x98 to (Flash Base) + 0x55h correctly returns the 'Q' 'R' and 'Y' query string. Writing 0x60 and then 0xD0 is su...


Buffers reqd for Flash??

Started by Mayank Kaushik in comp.arch.embedded12 years ago 1 reply

Hi, Im working on a prototype board for the AT91rm9200. I have been following the design of the AT91rm9200 EK. In using the same flash as...

Hi, Im working on a prototype board for the AT91rm9200. I have been following the design of the AT91rm9200 EK. In using the same flash as the obe used on the board, i have a small problem. Why have buffers been used between the chip`s lines and the lines of the flash? i have seen boards that use different flash chips and dont have buffers for the flash. What is the use of the buffer ...


xilinx Flash interface

Started by prak...@gmail.com in comp.arch.embedded12 years ago 1 reply

Hi, In my design I want to use the compact flash interface to my processor in FPGA. In the development board ACE controller is in between...

Hi, In my design I want to use the compact flash interface to my processor in FPGA. In the development board ACE controller is in between compact Flash and processor. I think the power PC access the ace controller for all read of Flash. Are there anyways I can make this flash as just memory device (PROM), and access without ACE controller. I'd seen some articles saying usage of flash as non ...


best way to add 3.3v flash to a 5v uP?

Started by Rob in comp.arch.embedded12 years ago 6 replies

previously, I have successfully connected an SPI based flash memory to a 5V system using resistors to drop the voltage down from 5v to 3.3 v for...

previously, I have successfully connected an SPI based flash memory to a 5V system using resistors to drop the voltage down from 5v to 3.3 v for the CS, CLK & SI lines and a FET controled by the flash for the 3.3v to 5v, SO connection. I now have to directly connect a flash chip to the address and data lines of a microcontroller. I now have to deal with something like 34 lines instead of 4...


LPC2119 In_Application Programming

Started by Ricardo Lozano in comp.arch.embedded14 years ago 4 replies

-I'm working with the LPC2119, and need to program the Flash via IAP, it's kind of an upgrade to the flash code. -I'm using the Interworking...

-I'm working with the LPC2119, and need to program the Flash via IAP, it's kind of an upgrade to the flash code. -I'm using the Interworking feature. -I start making an executable region for the flash programming in RAM, so i can erase the flash and still working, BUT in someway, the code in the RAM has references in part of the ROM, they are the veneers, and as i erased the flash, i can't f...


What kind of cell is there in a Serial flash?

Started by York in comp.arch.embedded11 years ago 13 replies

I am surveying a serial flash for storing data. I found the datasheet do not definitely mention the flowwing issues: 1. What is there, NOR or...

I am surveying a serial flash for storing data. I found the datasheet do not definitely mention the flowwing issues: 1. What is there, NOR or NAND type cell, in a SERIAL FLASH? 2. Is a wear-leveling necessary for a serial Flash? Is anyone can tell me? Grateful to any comment. Thanks.


Multiple flash roms

Started by in comp.arch.embedded14 years ago 3 replies

Hello! I?d like to connect either one or two flash-roms to a 32bit-processor (motorola coldfire 5272). I found some documentation at...

Hello! I?d like to connect either one or two flash-roms to a 32bit-processor (motorola coldfire 5272). I found some documentation at amd.com, they suggest two possibilities: When using one chip, A[0...N-1](Flash) should be connected to A[1...N](CPU). When using two chips, A[0...N-1](Flash) should be connected to A[2...N+1](CPU). Those two wiring methods are not compatible, I can not...


Programming AMD type Nor flash.

Started by JY Kim in comp.arch.embedded10 years ago 3 replies

I am working with samsung s3c2410 and ST M29W320T flash. The flash is AMD type Nor. I am using trace32 and going to check flash interface. As...

I am working with samsung s3c2410 and ST M29W320T flash. The flash is AMD type Nor. I am using trace32 and going to check flash interface. As far as I heard, to check flash interface one should download file. not just assigning value like checking SDRAM. Please let me know site or information on how to do this or trace32 cmm file. Please answer Thanks.


Embedded flash memory issue with Linux 2.6.10 kernel....

Started by James Kimble in comp.arch.embedded10 years ago

I'm using the 2.6.10 kernel on a custom circuit board based on Freescales MCF5485evb evaluation board. My board has different flash memory...

I'm using the 2.6.10 kernel on a custom circuit board based on Freescales MCF5485evb evaluation board. My board has different flash memory than the evaluation board and so requires different flash drivers than the BSP that was provided with the board. The flash memory I am using is the Intel P33 (256P33B) NOR flash. I have two chips with the chip selects tied to the same logic line. The ...


Internal Flash Programming (PowerPC)?

Started by Johannes Eble in comp.arch.embedded11 years ago

Hello all, I have to program the internal flash (it is called UC3F) of an MPC563 PowerPC. After having read the Reference Manual's chapter...

Hello all, I have to program the internal flash (it is called UC3F) of an MPC563 PowerPC. After having read the Reference Manual's chapter three times, I still don't understand fully how to write a sequence of bytes to the flash. I am sure that it is not that difficult, but it's the first time I have this kind of task. From what I understand: In order to rewrite the flash, you must fi...


About flash memory

Started by VG in comp.arch.embedded7 years ago 3 replies

One of the boards I am working on has a 16-bit STMicro NOR flash. According to the datasheet, four cycles are required to program the flash...

One of the boards I am working on has a 16-bit STMicro NOR flash. According to the datasheet, four cycles are required to program the flash through software. 1) 0x555 = 0xAA 2) 0x2AA = 0x55 3) 0x555 = 0xA0 4) actual address = actual data My questions are: a) In 1), 2) and 3) above, does the flash's internal mechanism actually write the given data bytes at the given locations, for e...


Programming FLASH on the Freescale Coldfire

Started by Randy Yates in comp.arch.embedded2 years ago 23 replies

Folks, We need to store some non-volatile parameters across power-ups and I'm trying to determine how to programmatically write to FLASH in...

Folks, We need to store some non-volatile parameters across power-ups and I'm trying to determine how to programmatically write to FLASH in the MCF52235 Coldfire V2 processor (256KB). From the reference manual it looks like reads from the ENTIRE FLASH are disabled when updating (erasing/programming) any part of the FLASH, even if you're just updating one of the 32 8 KB sectors. But I'm not...