EmbeddedRelated.com

boot.bin code from Atmel

Started by DavidP in comp.arch.embedded18 years ago 1 reply

I am having problems building a working boot.bin from the code downloaded fromn the Atmel site. I need to make a change to the sdram...

I am having problems building a working boot.bin from the code downloaded fromn the Atmel site. I need to make a change to the sdram controller initialization. I've tried using GCC 2.95.3 and 3.4.4. using 3.4.4 I get a "Data Abort detected" message when it starts up. Any help would be greatly appreciated! Thank you!


How to add some SDRAM to a FPGA board ?

Started by whygee in comp.arch.embedded15 years ago 25 replies

Hello, I thought that I could ask for advices on this group since most high-end embedded CPU have the same constraints. I would like to add...

Hello, I thought that I could ask for advices on this group since most high-end embedded CPU have the same constraints. I would like to add a good RAM capacity to existing evaluation/development boards equiped with 2.54mm pins. Ideally that would mean 32 or 64MB with a 16-bit datapath (32-bit would be too wide, too many wires...). SRAM are not possible, the largest I have are 36Mbits in...


AT91RM9200 linux woes

Started by roboman152 in comp.arch.embedded18 years ago 2 replies

Ok So Im to the point I dont know what to try next. Im trying to bring my custom AT91RM9200 board to life. I have 16MB of SDRAM on CS0 (starting...

Ok So Im to the point I dont know what to try next. Im trying to bring my custom AT91RM9200 board to life. I have 16MB of SDRAM on CS0 (starting at 0x20000000 ending at 0x21000000) and 2MB of data flash at 0xC0000000. First step was getting uBoot running. Which for some reason if I stick uBoot (1.1.4) as resident and try and let it relocate itself it wont run, no serial output. So I stuck with t...


Laying out ddr traces

Started by Simon in comp.arch.embedded12 years ago 7 replies

So, I'm trying to attach some DDR SDRAM to a blackfin DSP. It's the first time I've tried to lay out DDR, and I'm not finding it easy-going......

So, I'm trying to attach some DDR SDRAM to a blackfin DSP. It's the first time I've tried to lay out DDR, and I'm not finding it easy-going... Here's an image of the left side of the DSP and the entire DDR chip... http://0x0000ff.com/imgs/eagle/bga-ddr.png. In line with what I've been reading, I was trying to get CK,/CK laid out first, then sync up address[0:15], ba[0:3], /RA


Kernel panic / page fault help

Started by roboman152 in comp.arch.embedded18 years ago 1 reply

Hi, Im a newb to working at this level with the kernel. (mainly a hardware guy) Anyways im trying to get 2.6.14 to run on my custom board. Ive...

Hi, Im a newb to working at this level with the kernel. (mainly a hardware guy) Anyways im trying to get 2.6.14 to run on my custom board. Ive got 16MB of SDRAM and 2MB of Dataflash, it enters the kernel but page faults, below is the whole nitty gritty, any suggestions on what could cause this/ were to look for a solution? U-Boot 1.1.2 (May 17 2006 - 15:46:16) U-Boot code: 20F00000 ->


PSRAM is SDRAM , but at .00007 amps !

Started by werty in comp.arch.embedded17 years ago 1 reply

The M 69 AW 024 2 megaByte DRAM is so low power , they did not want to call it DRAM , so they tagged it ...

The M 69 AW 024 2 megaByte DRAM is so low power , they did not want to call it DRAM , so they tagged it PSRAM All the transistor methods are pulling about same milliwatts/megahertz , so CMOS is same as DRAM . CMOS at 50Mhz gets hot ! So why not just use DRAM !! Besides , 2MegaBytes is impossible ,in CMOS at that price and density ... ...


Maximum Memory Usage?

Started by Ahmed Samieh in comp.arch.embedded17 years ago 8 replies

Hello all on RTOS like ST20 OS, how to determine the maximum usage of RAM? the system now use 16 MB of SDRAM and we need to know what is...

Hello all on RTOS like ST20 OS, how to determine the maximum usage of RAM? the system now use 16 MB of SDRAM and we need to know what is the maximum of usage to reduce the size of ram in order to reduce product cost thanx ------ Ahmed Samieh


PPC eval board

Started by Tom St Denis in comp.arch.embedded19 years ago 11 replies

I googled this group and the web and haven't found what I'm looking for. Basically I want a PPC board [like a PPC405, something that runs...

I googled this group and the web and haven't found what I'm looking for. Basically I want a PPC board [like a PPC405, something that runs the basic 32-bit ISA] where I can upload programs [usually


Memory selection for an embedded system

Started by Anonymous in comp.arch.embedded18 years ago 6 replies

Hi all, I'm currenlty gettting into embedded system architecture and would like to know where can I find any kind of tutorial/articles/lecture...

Hi all, I'm currenlty gettting into embedded system architecture and would like to know where can I find any kind of tutorial/articles/lecture notes regarding the "art" of selecting the memory for my design I.E. what kind of memory to use SDRAM , SRAM ,FLASH ,EEPROM and where to use it. another thing I'm looking for is stuff on the subject of memory mapping I.E. how to arrange the different ...


Longest path length from SDRAM controller to DRAM?

Started by Anonymous in comp.arch.embedded16 years ago 14 replies

I'm trying to design a test setup to do radiation experiments on SDR DRAM for my thesis. The DRAM needs to be isolated from our control unit...

I'm trying to design a test setup to do radiation experiments on SDR DRAM for my thesis. The DRAM needs to be isolated from our control unit b/c I'm worried about contaminating our results by having our control circuitry in there too - b/c then how do we know if it's the DRAM or "something" else that fails. So my question is, what's the longest length I can run a ribbon cable (or other...


Help with programming an 8272 to work with Micron MT48KC16M16A2 RAM

Started by Larr...@gmail.com in comp.arch.embedded17 years ago 2 replies

We are trying to program a MPC8272 to work with some Micron MT48KC16M16A2 SDRAM, and we are not having much success. I am wondering if anyone...

We are trying to program a MPC8272 to work with some Micron MT48KC16M16A2 SDRAM, and we are not having much success. I am wondering if anyone has a link to either an app note that details how to program the memory controller registers to work with this memory or some sample code that does it. Thanks! -larry


AT91RM9200 and AC97 codec - not recommended ?

Started by Pelos in comp.arch.embedded18 years ago 4 replies

Hi everybody. I'm finishing my RM9200 board (32MB SDRAM, 2MB SPI NOR, Smart Media, RTL8201). Now I need to choose te audio interface. First -...

Hi everybody. I'm finishing my RM9200 board (32MB SDRAM, 2MB SPI NOR, Smart Media, RTL8201). Now I need to choose te audio interface. First - I was thinking about AC97 codec - like National's LM4549 because I saw this chip in some RM9000 SDK boards. But I saw some posts with information that AT91RM9200 and its SSC doesn't work with AC97 codec. Can somebody confirm (or better not ;) ) t...


Bringing up ecos on Integrator/AP.

Started by ivy in comp.arch.embedded19 years ago 2 replies

Dear friends, I am very newbie to this list and also ecos... I have a Integrator /AP (ARM920T) Evaluation Board. It has 128MB...

Dear friends, I am very newbie to this list and also ecos... I have a Integrator /AP (ARM920T) Evaluation Board. It has 128MB SDRAM. Actually m trying to run ecos + application program on it. Basically i dont know th exact procedure to follow.. My Evalutation Board has inbuilt ARM BootPROM. Using that have downloaded prebuilt Redboot to Flash. Redboot is working ...


Regarding cold boot and SDRAM status

Started by ssubbarayan in comp.arch.embedded18 years ago 1 reply

Dear all, Recently happened to investigate an exception issue due to raising of exceptions from ISRs. I am using ARM based custom processor...

Dear all, Recently happened to investigate an exception issue due to raising of exceptions from ISRs. I am using ARM based custom processor with vxworks 5.5.I have the following doubt: The vxworks manual states that when ever an exception happens from ISR the system will get rebooted and it will print the reason behind exception on system console. My doubt is where exactly in physical me...


Changing refresh rate for DRAM while in operation?

Started by Anonymous in comp.arch.embedded16 years ago 31 replies

Hi, I'm trying to control a SDR SDRAM (Micron 64Mbit chip) using an Altera DE2 board. I've gotten the hardware interface squared away...

Hi, I'm trying to control a SDR SDRAM (Micron 64Mbit chip) using an Altera DE2 board. I've gotten the hardware interface squared away (thanks everyone for your help!). Now it's the tricky stuff. Any one have an idea how I can change the refresh rate while the RAM is in operation? I have the DRAM interface built using the SOPC builder that comes with Quartus II using the NIOS II system...


AT91RM9200 bootloaders (to boot into u-boot)

Started by Darrell Harmon in comp.arch.embedded20 years ago 2 replies

I have a board based on the AT91RM9200, and want to boot from SPI dataflash. The loader will proceed to boot u-boot (Which is too big for the...

I have a board based on the AT91RM9200, and want to boot from SPI dataflash. The loader will proceed to boot u-boot (Which is too big for the ROM bootloader to handle). I have read the atmel appnote on that, but boot program will need to be changed. My SDRAM is configured differently than the DK. The program with the appnote includes source, but it is missing quite a bit to be able to be ...


DDR / DDR2 memory controllers

Started by Richard in comp.arch.embedded20 years ago 10 replies

I've got an application that's RAM-hungry (64MB+), but doesn't need a lot of horsepower. Does anyone have experience using a memory controller...

I've got an application that's RAM-hungry (64MB+), but doesn't need a lot of horsepower. Does anyone have experience using a memory controller to connect an 8- or 16-bit GPIO bus to DDR or DDR2 RAM? We've looked at hacking the timing for SDRAM - it looks workable via GPIO, but it also seems to have a short future. The option of using cheap DIMMs looks great (even though the sockets are ...


want to experiment, have micromint rtc-52 board

Started by Anonymous in comp.arch.embedded19 years ago 1 reply

About 15 years ago, I bought a micromint rtc-52 board and ended up just using a plc for the project. So here I am today, with the board and an...

About 15 years ago, I bought a micromint rtc-52 board and ended up just using a plc for the project. So here I am today, with the board and an itch to do something with it to learn a bit. The board powered up fine. Basic on it is very basic. Sadly, the NV SDRAM is very V. I guess the DS1235YW chip had a 5 year life. It looks like I can put a DS1230Y in and move up from 8Kx8 to 32kx8. ...


Not able to boot from NAND

Started by vinaysandeep in comp.arch.embedded15 years ago 3 replies

We are not able to boot from NAND flash on our custom board with the following hardware. AT91SAM9263 ...

We are not able to boot from NAND flash on our custom board with the following hardware. AT91SAM9263 64 MB NAND flash (Page size: 512 byte + 16 byte). (Company: ST/numynox) 64 MB SDRAM 2. The Bootstrap and U-Boot is located in the NAND flash at the offsets 0x0 and 0x4000 respectively. 3. However, if the Bootstr...


USB Flash Drive Problem after switching to PSRAM

Started by sg83 in comp.arch.embedded16 years ago

Hi everyone, My development board has two memory banks, SDRAM (128MB) and PSRAM (16MB). I've got the linux kernel booting from only the PSRAM,...

Hi everyone, My development board has two memory banks, SDRAM (128MB) and PSRAM (16MB). I've got the linux kernel booting from only the PSRAM, but I can't get a USB Flash Drive to work properly. It is being detected, but I get the following messages: --------------------------------------------------------------- usb 1-1: reset high speed USB device using fsl-ehci and address 4 sd 2:0:0:0: [...