Problem Porting nucleus onto AT91RM9200

Started by psriniva in comp.arch.embedded14 years ago 1 reply

Hi, I am trying to port Nucleus Kernel onto the AT91RM9200 Target (on Cogent CSB337) using Nucleus EDGE IDE. I am facing some problem with the...

Hi, I am trying to port Nucleus Kernel onto the AT91RM9200 Target (on Cogent CSB337) using Nucleus EDGE IDE. I am facing some problem with the Stack handling especially while servicing the interrupts. Has anyone been able to successfully prot Nucleus RTOS onto AT91RM9200? Please let me know. Thanks and Regards, Prashanth


arm-elf-gcc building erroneous code for ISR (long posting)

Started by Jens Hildebrandt in comp.arch.embedded16 years ago 4 replies

Hello group, I'm curently trying to get familiar with the ARM7 by building some example-projects for a LPC2106-controller. One such project...

Hello group, I'm curently trying to get familiar with the ARM7 by building some example-projects for a LPC2106-controller. One such project is the blinky_irq example from Keil which should demonstrate the use of interrupts and of the LPC2xxx vectored interrupt controller. I'm using gcc-3.2.1 with binutils 3.13.1 and newlib 1.11.0 . So far I had no problems with these tools and I was abl...


Strange behaviour in PIC18 interrupt

Started by R. Wilcock in comp.arch.embedded15 years ago 13 replies

I am using a PIC18F4320 and have been trying to solve a very strange problem.. I have configured an interrupt using Timer1 which fires every...

I am using a PIC18F4320 and have been trying to solve a very strange problem.. I have configured an interrupt using Timer1 which fires every 1ms. In that interrupt an ascii character gets sent, and is incremented, every time. Also, every 79 interrupts another section of the code gets executed, which just sends a '%' and resets the ascii code to '1'. Nothing else is going on AT ALL in the...


Compiler Support for Ensuring that a Statement is Atomic

Started by Datesfat Chicks in comp.arch.embedded10 years ago 16 replies

This is slightly off-topic, as it involves implementation rather than the C language. It frequently comes up in embedded systems that one...

This is slightly off-topic, as it involves implementation rather than the C language. It frequently comes up in embedded systems that one wishes to ensure that a C-language statement is atomic. One might have available functions or macros to disable or enable interrupts, so one might write: volatile int sempahore; DI(); sempahore++; EI(); Whether an increment can b...


Help needed with SCI interrupts (HC12)

Started by Anonymous in comp.arch.embedded13 years ago 10 replies

Hello. I'm writing a program for an NE64 board, which reads a series of data over the SCI1 port, and then transmits them over the Ethernet...

Hello. I'm writing a program for an NE64 board, which reads a series of data over the SCI1 port, and then transmits them over the Ethernet port. Pretty much it's done and works, but due to the amount of data collected on every reading, I have to send out 10-15 packets every time. My problem is that, when the function for UDP transmission is executed, some of the data received on the serial ...


Adobe Flash served by embedded processor w/o O.S.

Started by Dave Boland in comp.arch.embedded11 years ago 2 replies

Currently, I use AJAX to provide a near-realtime display of data for a device (basically data acquisition and some control). The box contains...

Currently, I use AJAX to provide a near-realtime display of data for a device (basically data acquisition and some control). The box contains a 16-bit processor, TCP/IP stack, but no OS (I use timer interrupts the same way car companies use them in engine controllers). The user interface is a table of values read/set, some alarms when something is out of spec., and a few configuration ...


Advanced Transdata

Started by Bill Chernoff in comp.arch.embedded15 years ago 1 reply

I am using a Rice17A to emulate a PIC18C252. Having a lot of fun trying to debug 2 timer-overflow based interrupts. One is high priority, one...

I am using a Rice17A to emulate a PIC18C252. Having a lot of fun trying to debug 2 timer-overflow based interrupts. One is high priority, one is low. I can't single step because the timers keep right on running, so they overflow and interrupt pretty much immediately, when single stepping. Now I've got my Logic analyzer to trigger properly, and its trigger out goes into the Rice's break inp...


PUSHF equivalent for HCS08 uc ??

Started by Ether Jones in comp.arch.embedded13 years ago 6 replies

Does anyone know how to "push flags" on the HCS08 series microcontrollers? I have a section of code that I need to make non-interruptable. ...

Does anyone know how to "push flags" on the HCS08 series microcontrollers? I have a section of code that I need to make non-interruptable. But I can't simply do this: DisableInterrupts EnableInterrupts ... because I don't know whether or not interrupts were disabled in the first place, and if they were disabled, I don't want to enable them. I want t


best way to simulate multi core architecture ?

Started by TheWhizKid in comp.arch.embedded15 years ago 6 replies

Hi guys, Please give me some suggestions ! 1. I need to make a cycle accurate simulator for a dual core cpu. How do I pass external events...

Hi guys, Please give me some suggestions ! 1. I need to make a cycle accurate simulator for a dual core cpu. How do I pass external events like interrupts from one core to another during the simulation ? 2. How does one make a "C" reference model talk to a verilog model during a simulation ? is "PLI" the only way ? Thanks thewhizkid


Re: PIC Input Capture

Started by Gary Kato in comp.arch.embedded16 years ago 1 reply

Forgot. You should also disable interrupts while calculating your pulse with and pulse interval since the values you are using can change at any...

Forgot. You should also disable interrupts while calculating your pulse with and pulse interval since the values you are using can change at any time if you don't. If you don't, you'd still get weird values. Say this happens: MOVF low(fall),w SUBWF low(last_fall),w You'd get an interval of 0 once more.


Compact Flash operation by interrupts

Started by Vladimir Vassilevsky in comp.arch.embedded13 years ago 2 replies

I am trying to implement a non-blocking driver for the CF card. So, this driver has to operate by CF interrupt rather then by polling the...

I am trying to implement a non-blocking driver for the CF card. So, this driver has to operate by CF interrupt rather then by polling the registers. So far so good, however one problem remains: Is it possible to generate the interrupt when the write sector operation is complete, i.e. when the CF is ready for the next sector write? VLV


Interrupt not firing on PIC18F

Started by namezmud in comp.arch.embedded15 years ago 1 reply

I've started tinkering with a PIC18F4680 (with CAN bus) using microchips MPLAB C18 C compiler. I've been beating my head against a problem for...

I've started tinkering with a PIC18F4680 (with CAN bus) using microchips MPLAB C18 C compiler. I've been beating my head against a problem for many hours now :evil: . I can't get interrupts to work. I have tried, TMR0, TMR1 and INT0. I have verified that TMRnIP, TMRnIE, TMRnIF and GIEH & IPEN are all HIGH yet my ISR does not get run. If I clear TMRnIF in the main loop TMRnIF is set aga...


timerx hitachi 3642/3644

Started by icurmt in comp.arch.embedded16 years ago 7 replies

Hi, I am trying to count the number of pulses through timerx. Infact, I need to observe two input pulses. I need to obtain the pulses...

Hi, I am trying to count the number of pulses through timerx. Infact, I need to observe two input pulses. I need to obtain the pulses received on A between every input pulses to B. For example, whenever I receive pulse on say B, I need to reset the counter A and start counting the pulses A receives until B's next input. Does it make sense to do it w/o setting any interrupts on A or B....


Differences between interrupt service routine (ISR) and a subroutine

Started by 2005 in comp.arch.embedded13 years ago 36 replies

Hi What are the differences between ISR and a subroutine in embedded systems, how about the following: - interrupts are disabled by the...

Hi What are the differences between ISR and a subroutine in embedded systems, how about the following: - interrupts are disabled by the microprocessor prior to calling the isr - isr's are always smaller - an isr cannot be written in C - a subroutine always has arguments - the CPU flags are stored on the stack in addition to the return address Thanks


Floating point calculations on 16 uC

Started by db in comp.arch.embedded15 years ago 17 replies

Hi, I'm doing floating point calculations on a Fujitsu MB90F474 16bit uC. All float calculations are done in the main loop context. Sometimes...

Hi, I'm doing floating point calculations on a Fujitsu MB90F474 16bit uC. All float calculations are done in the main loop context. Sometimes the result returns a garbage value. This seems to happen only when interrupts are enabled. Note that there are no globals or shared data involved. If anyone has had similar problems please let me know. Any advice when using floating point calculat...


Dallas RTC 1305 and interrupts

Started by Georges Konstantinidis in comp.arch.embedded16 years ago 1 reply

Hello All, I started a project which uses a PIC16F876 and a RTC DS1305 from Dallas. There is no problem to read and write the registers. My only...

Hello All, I started a project which uses a PIC16F876 and a RTC DS1305 from Dallas. There is no problem to read and write the registers. My only problem is the interruption . I connected the INT0 for the RTC to the RB0 pin of the PIC (I used a 5k pull-up resitor). I configured correctly (I think ) the registers to activate a interrupt every second . When I test my program, it appears that th...


simulation tutorial? Asynchronous interrupts?

Started by mike in comp.arch.embedded6 years ago 5 replies

I'm writing simple programs for a PIC 16F877A. Attempting to simulate with MPLAB. Linear code...no problem. But I've never written a...

I'm writing simple programs for a PIC 16F877A. Attempting to simulate with MPLAB. Linear code...no problem. But I've never written a program that didn't have multiple asynchronous interrupt inputs and timers. The MPSIM seems to fall apart in that instance. Yes, there are ways to simulate inputs, but the asynchronous nature is where all the problems happen. State another way, no pro...


Configure Port2 pin as an interrupt

Started by ninan in comp.arch.embedded11 years ago 5 replies

Hi, I'm using LPC2378 for my current project. I want to configure Port2.7 Pin as an interrupt. I have already used up all the 3...

Hi, I'm using LPC2378 for my current project. I want to configure Port2.7 Pin as an interrupt. I have already used up all the 3 External Interrupts(EXINT0,EXTIN1,EXINT2). It been said tat EXTINT3 Pin can be configured as an interrupt for a GPIO Pin, which i am not clear with. Please help me in this regard, Ninan, India


Software Architechture comparison, comments and sugestions...

Started by Sink0 in comp.arch.embedded8 years ago 21 replies

I was thnking with myself today and i remembered an old software architecture for embedded systems division: 1. Round-robin 2. Round-robin...

I was thnking with myself today and i remembered an old software architecture for embedded systems division: 1. Round-robin 2. Round-robin with interrupts 3. Function-queue-scheduling 4. Real-time Operating Syste IHMO the first one is just a subset of the second so i will just ignore it. I was thinking on what kind of architecture i usually use on my projects (that usually range bew...


Serial communication with Infineon C167 (Tasking Compiler)

Started by Howard in comp.arch.embedded16 years ago 7 replies

Hi. We are having a prosject at school, and are currently testing the Infineon C167 ?C with Tasking EDE compiler (C). But we get...

Hi. We are having a prosject at school, and are currently testing the Infineon C167 ?C with Tasking EDE compiler (C). But we get some problems using the serial interface. I think the initialization of the registers and so on actually are correct. This because we've tried to force both receive- and transmit-interrupts by setting those flags, and made the interrupt routines to give out diffe...