Hi, I have a datalogger with an eeprom memory, and i want to upgrade it to a serial flash memory. the problem is that when the memory is full it...

Hi, I have a datalogger with an eeprom memory, and i want to upgrade it to a serial flash memory. the problem is that when the memory is full it will start writing at the begining of the memory, and thats ok with the eeprom, but with the flash i will have to erase the whole block, so that its not ok. the message that im writing its 16 Bytes Long. anyone can help me with that? Thank you! ...

Hi, In MSP430F1101A, How information memory differs from flash memory? In what way it is useful for a programmer? If anyone have any...

Hi, In MSP430F1101A, How information memory differs from flash memory? In what way it is useful for a programmer? If anyone have any supporting documents related to this, please guid me. Thanks in advance This message was sent using the comp.arch.embedded web interface o www.EmbeddedRelated.com

Hi every body, I am new to this field. I want to know some clarification 1. What is memory mapped ? 2....

Hi every body, I am new to this field. I want to know some clarification 1. What is memory mapped ? 2. What is IO mapped ? 3. what is memory mapped IO ? 4. what is IO mapped memory? I am looking for ur valuable commants...

Hi, I am trying to understand Memory Overlay. I got few links from internet , but they are not very elaborative. Is there any other link /...

Hi, I am trying to understand Memory Overlay. I got few links from internet , but they are not very elaborative. Is there any other link / pdf that talks in detail about this Memory Overlay ? Thx in advans, Karthik Balaguru

Hi Friends, I'm using sdcc 2.8.0 #5117 to build code for a 8051 derivative that has 256 byte internal RAM. I'm using a small model and for...

Hi Friends, I'm using sdcc 2.8.0 #5117 to build code for a 8051 derivative that has 256 byte internal RAM. I'm using a small model and for some reason I'm unable to use the entire memory. When I look at the memory map I see that the sdcc uses the upper 128B for stack, and does not permit data to reside there. I've tried reducing the stack size and change the location of different memory compo...

Hi All, I want to confirm my understanding on following RTOS concepts. 1) There are two kind of memory management is required, one when...

Hi All, I want to confirm my understanding on following RTOS concepts. 1) There are two kind of memory management is required, one when task are switching and we need to allocate memory to tasks and also to place the TCB for switching tasks. IS it right that this memory management is done by the RTOS Task management feature(Not by the memory management feature). 2) Also other level of me...

Hi, What is memory mapping. If i memory mapped registers in my pheipheral,. The value written to them is teh value written to memory or it...

Hi, What is memory mapping. If i memory mapped registers in my pheipheral,. The value written to them is teh value written to memory or it will be written on physical registers in Pheripheral. Let me explain you cauz i know my description is bit confusing..... I have FPGA with a processor. Now i want to connect this processor with Custom IP (on FPGA) using Processor Local Bus. I know cus...

I am not sure whether folks in this group would count a device such as the pogoplug as an embedded device, but it applies also to many...

I am not sure whether folks in this group would count a device such as the pogoplug as an embedded device, but it applies also to many development boards. I am experimenting for some time with two pogoplugs running linux, booting arch linux from an USB memory stick. It seems that particular the cheap supermarket memory sticks do not last long. In one case, within a week the USB memory st...

Hi, If the 'free' does not return the memory back to the OS, then what is the advantage of it. Will it not drain the memory in...

Hi, If the 'free' does not return the memory back to the OS, then what is the advantage of it. Will it not drain the memory in certain scenarios ? Why does free' of certain OS return the memory back to OS while others do not ? Thx in advans, Karthik Balaguru

Hello, I am working on an embedded device in which I need to configure LPDDR memory. Since LPDDR does not always support SRR (status register...

Hello, I am working on an embedded device in which I need to configure LPDDR memory. Since LPDDR does not always support SRR (status register read) function, I need to find the data width of the memory manually, and configure the system memory controller accordingly. Can someone suggest a way to find this? Thanks for help in advance.

Hi Is there some tool to view a memory map out of a Intel hex-File or even better see where which var / function goes into memory out of the...

Hi Is there some tool to view a memory map out of a Intel hex-File or even better see where which var / function goes into memory out of the obj/s51/mem file of the compiler? It is a 8051 compiler. I know such a tool as Memory Map viewer from the Renesas M16 for these types of controllers. Thanks and best regards, Franz

Hi, I would like to learn about memory tetsing , mainly flash memory test. Can anybody help me in providing documents for the same. I...

Hi, I would like to learn about memory tetsing , mainly flash memory test. Can anybody help me in providing documents for the same. I have searched in net, without proper guidance I could not come to a conclusion which is useful. Please. Thanks and Regards Sooraj Sasindran

Until now I never used a microcontroller with an embedded DMA controller, so I always use the CPU to move data from memory to memory, from...

Until now I never used a microcontroller with an embedded DMA controller, so I always use the CPU to move data from memory to memory, from memory to peripheral, from peripheral to memory. The micro usually have only a two-byte hardware FIFO (the byte currently shifting in and the previous completely received byte). So I often implement a sw FIFO buffer for receiving data from UART. In ...

C applications use pointers. A lot. And it is easy to make a mistake with a pointer, producing an illegal memory reference or unwanted...

C applications use pointers. A lot. And it is easy to make a mistake with a pointer, producing an illegal memory reference or unwanted program behavior. A real problem with finding an error with a pointer is that the damage may occur long before any application symptoms occur. For instance, one can store a value indirect through a dangling pointer, damaging memory now used for another ...

Conceptually, memory (or a memory region) can be thought of as being readable, writeable or executable -- and any combination of these. ...

Conceptually, memory (or a memory region) can be thought of as being readable, writeable or executable -- and any combination of these. Hardware *may* enforce these protections -- to varying degrees. Usually, you opt to PREVENT some set of these operations (i.e., no write, no read, no execute). In many cases, this acts as an invariant -- "this is data; nothing should be mucking with it ...

Consider a Pentium PC with main memory and a PCI bus. One can plug memory-type devices into the PCI bus, things like video or ADC buffers, CPCI...

Consider a Pentium PC with main memory and a PCI bus. One can plug memory-type devices into the PCI bus, things like video or ADC buffers, CPCI cards, and including, I suppose, more program-space memory. A couple of questions: Is there (I guess there must be) a mechanism for a Windows program to directly map a chunk of PCI-bus memory into its virtual address space? Anybody know how this...

Hi, I am trying to configure DMA controller on LPC2468 .I got the sample code on NXP website. It is transfering data from memory to memory...

Hi, I am trying to configure DMA controller on LPC2468 .I got the sample code on NXP website. It is transfering data from memory to memory .This memory is internal USB SRAM. But not work on simulator of keil software Evaluation Version 3.23. Any one can help me in this regards. Swapnali

Does anyone know what the SDRAM memory latency is going to be for this new embedded controller chip? Latencies on past PPCs were abysmal (~280...

Does anyone know what the SDRAM memory latency is going to be for this new embedded controller chip? Latencies on past PPCs were abysmal (~280 ns for MPC7447 1.4 GHz with Marvell Discovery memory controller). I'm hoping the MPC8641D does better with its on-chip memory controller. It would be nice if the latency approached the SDRAM tRC, like modern x86s. -- /* jhallen@world.std.com A...

Hi there, Anybody have experience in implementing an eCos TCP/IP stack on an ARM? Is a footprint of 200k program memory and 120k data...

Hi there, Anybody have experience in implementing an eCos TCP/IP stack on an ARM? Is a footprint of 200k program memory and 120k data memory reasonable? Seems a little high to me. Without too much eCos experience, I might have expected about half the program memory and 1/4 the data memory. -- Alf Katz alfkatz@remove.the.obvious.ieee.org

Hi, How is area of the memory that you use related to energy consumption in an memory device. So if I have two memory devices of same...

Hi, How is area of the memory that you use related to energy consumption in an memory device. So if I have two memory devices of same capacity, one larger than the other, can I comment on its energy behavior just based on the area. thanks Shrey