Forums Search for: VHDL
USB3300 - Xilinx ML401 interface ...
Hi, I wanted to send some data from the USB port of my computer to the Xilinx ML401 board via the USB3300 card. My restriction is that I cannot...
Hi, I wanted to send some data from the USB port of my computer to the Xilinx ML401 board via the USB3300 card. My restriction is that I cannot use the MircoBlaze package. When I connect the USB3300 to the Xilinx board and then to the USB port of my computer, I donot get a VID and PID. I wanted to know if I need some kind of VHDL code/core running on the ML401 initially that activates the USB3300...
Simple ram model
Hi, Guy's, I'm not sure if this is the best place to ask but, I am currently learning VHDL and am trying to design a RAM model with the...
Hi, Guy's, I'm not sure if this is the best place to ask but, I am currently learning VHDL and am trying to design a RAM model with the following spec: Inputs: A (3 bit address), D (4 bit data), Clock, plus control input(s) as required Output: Q (5 bit data) The design contains two units, a RAM (3 bit address, 4 bit data, separate data input and output) and an arithmetic unit (two 4-bi...
write characters on a HD44780 controlled LCD display
hi there i'm writing data to a HD44780 controlled LCD display with a PLD programmed in VHDL. but no data appears at all. the timing must be...
hi there i'm writing data to a HD44780 controlled LCD display with a PLD programmed in VHDL. but no data appears at all. the timing must be ok, as when i push the reset button on the development kit, the data appears on the screen, but only while i push the button. after the initialization cycle (write "00111000" three times with appropriate timing, then "00111000" "00001111" "00000001" ...
[ANN] Free web access to the HercuLeS high-level synthesis tool
Dear all i'm pleased to announce that free access to the web interface of the HercuLeS high-level synthesis tool is now available. HercuLeS...
Dear all i'm pleased to announce that free access to the web interface of the HercuLeS high-level synthesis tool is now available. HercuLeS allows you to synthesize ANSI C code or generic-assembly code (certain rules apply) to RTL VHDL. The web interface can be accessed from here: http://www.nkavvadias.com/cgi-bin/herc.cgi A short how-to, simulation packages and ready-to-use example...
Software Defined Radio auf Xilinx Virtex 4
Hallo, ich arbeite seit 3 Monaten mit einem Xilinx Ml405 Virtex 4 Board und wollte darauf nun mal ein Software Defined Radio...
Hallo, ich arbeite seit 3 Monaten mit einem Xilinx Ml405 Virtex 4 Board und wollte darauf nun mal ein Software Defined Radio (SDR) implementieren. Ich verstehe alles was auf SDR betrifft (Theorie, Funktionsweise, etc..) ganz gut . Genauso kann ich auch VHDL und VERILOG. Jetzt w=FCrde ich gerne wissen, ob Jemand sich damit auch besch=E4ftigt einem SDR auf oben genanntem Board (oder anderen...
