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problem with 89c51RD2 "SPI" !

Started by Meysam Peykanu in comp.arch.embedded20 years ago 2 replies

Hi everyone, I have problem with serial perioheral interface SPI of 89c51rd2. It simply doesn't output anything. no clock no data! I had...

Hi everyone, I have problem with serial perioheral interface SPI of 89c51rd2. It simply doesn't output anything. no clock no data! I had checked the system with atmel example code too. no effect:( The chip has a register for the SPI status and it shows collision even when I haven't send any data to the transmit register. It also shows inapprapriate level of /SS and /SS deasserted although I ...


What application requires 500MHz for embedded processors

Started by jade in comp.arch.embedded18 years ago 38 replies

ARM 11 and MIPS 24K both provides clock rate up to 500MHz or even 550MHz. That's an incredible high frequence and thus very high...

ARM 11 and MIPS 24K both provides clock rate up to 500MHz or even 550MHz. That's an incredible high frequence and thus very high performance. But I wonder what kind of application requires such high frequence? I think handheld product will NOT carry server level application. A 200MHz should be enough for most application run on mobile products. Any idea? Thanks. Jade.


Timing Measurement of PPC processor

Started by anwar_pc in comp.arch.embedded15 years ago 2 replies

Hi, I'm running VxWorks Os on a MPC 8323 processor. The VxWorks timers are based on the OS ticks (several mili seconds), but I need a way...

Hi, I'm running VxWorks Os on a MPC 8323 processor. The VxWorks timers are based on the OS ticks (several mili seconds), but I need a way to measure small time intervals of micro seconds.Is there a Real Time clock register to read, or a cotinueosly running counter register to calculate the interval time from it? Thanks Anwar


Problem with A/D

Started by Dado in comp.arch.embedded19 years ago 8 replies

Hello, I have problem with .C programming! (Working with Code Vision for AVR). I have set up one PCF8591 on I2C BUS. Can You help me with...

Hello, I have problem with .C programming! (Working with Code Vision for AVR). I have set up one PCF8591 on I2C BUS. Can You help me with code, where I m doing wrong? Chip type : ATmega8515 Program type : Application Clock frequency : 4,000000 MHz Memory model : Small External SRAM size : 0 Data Stack size : 128 Communication parameters: 9600 8N1 [RS232 SPARE header] [PORT...


Real-time graphics display Windows or Linux

Started by Sarah Michael in comp.arch.embedded20 years ago 10 replies

Hi All, I want to display the real-time data using OpenGL and is woundering if Windows 2000 Pro on PIV is good enough for such task. The...

Hi All, I want to display the real-time data using OpenGL and is woundering if Windows 2000 Pro on PIV is good enough for such task. The uptime required for the system is 1000 hours. Once I read somewhere that there is a conflict between windows internal colck and CPU that causes a need for reboot the system. Due to this clock synchronization problem W2K machine have to be rebooted af...


SD memory protocol timing issue

Started by himassk in comp.arch.embedded18 years ago 1 reply

Hi, In SD memory Physical layer specification Version 1.10 written that: Reference to Page no 75, Fig 25 Identification Timing: The timing...

Hi, In SD memory Physical layer specification Version 1.10 written that: Reference to Page no 75, Fig 25 Identification Timing: The timing for CMD2 and ACMD41 is: The command is followed by a period of two Z bits (allowing time for direction switching on the bus) and then by P bits pushed up by the responding card. The card response to the host command starts after NID clock cycles. (NI...


i2c repeater

Started by Nadav in comp.arch.embedded20 years ago 16 replies

Hi, I wanted to implement an i2c repeater in software. Actually, Not a complete i2c but only one master to one slave repeater. I thought...

Hi, I wanted to implement an i2c repeater in software. Actually, Not a complete i2c but only one master to one slave repeater. I thought I can use a microcontroller and connect two I/Os to the master and 2 more to the slave in open drain fasion. So I need to reflect the clock from the master to the slave and the data to/from the master from/to the slave, depending on the direction. I thoug...


Zilog Z8S180 problems - solved

Started by Mike Harding in comp.arch.embedded19 years ago 6 replies

Zilog Z8S180 problems - solved Some of you may recall that about 3 weeks ago I posted...

Zilog Z8S180 problems - solved Some of you may recall that about 3 weeks ago I posted the following: ------------------------------------------------------------------- I seem to be unable to access the new registers on the Zilog Z8S180 CPU, things like the Clock Multiplier register, the additional DMA register etc. When I try to write to these registers my writes seem to be ignored and...


CPU temperature reading with C

Started by Flemming Hansen in comp.arch.embedded19 years ago 1 reply

Hi, Here is the deal: I've connected a 2x20 HD44780 based LCD to the parallel port and trying to program it. I'm using Borland C. I've managed...

Hi, Here is the deal: I've connected a 2x20 HD44780 based LCD to the parallel port and trying to program it. I'm using Borland C. I've managed to program the HD44780. What I want to do is displaying different Mother Board settings at the LCD. There are plenty of programs doing taht, but I want to make my own simple DOS program displaying i.e CPU teperature, System temperatur, system clock ...


Wide frequency range, arbitrary waveform DDS

Started by Stef in comp.arch.embedded2 years ago 3 replies

To generate frequencies from approximately 0.5 mHz to 12 MHz with a DDS a minimum clock of > 24, say 25 MHz, is required. To be able to go...

To generate frequencies from approximately 0.5 mHz to 12 MHz with a DDS a minimum clock of > 24, say 25 MHz, is required. To be able to go down to 0.5 mHz, a phase accumulator of at least 36 bits is required. This will give sub mHz resolution over the entire range. Nice for the low frequencies, but not of much use for MHz frequencies (in this application). Is there any objection to using a


[msp430] problems setting 8MHz CPU frequency

Started by Oskar in comp.arch.embedded16 years ago 7 replies

Hi, I'm trying to clock the CPU (MSP430F1611) to 8,000,000 Hz and I've run into some problems. Making the CPU to actually run at 8MHz was...

Hi, I'm trying to clock the CPU (MSP430F1611) to 8,000,000 Hz and I've run into some problems. Making the CPU to actually run at 8MHz was easy enough: DCOCTL = DCO0 + DCO1 + DCO2; /* 0xE0 */ BCSCTL1 = XT2OFF + RSEL0 + RSEL1 + RSEL2; /* 0x87 */ However, the UART1 stopped working. What I've got so far is: void uart1_init( unsigned int ubr ) { /* RS232 */ P3DIR &= ~0...


Cypress Add Turbo 8051 to PSoC (and Cortex too)

Started by -jg in comp.arch.embedded15 years ago

Cypress cover BOTH bases, in a move that has to get everyone's attention ! - Single clock 8051 16/32/64KF, up to 8KR, with up to 67MHz...

Cypress cover BOTH bases, in a move that has to get everyone's attention ! - Single clock 8051 16/32/64KF, up to 8KR, with up to 67MHz operation, and 120 part numbers Wide 1.7-5.5V operation.. LCD drive, 0.5V boost regulator... 0.1% voltage reference (14 ppm/=B0C) optional 24bx24b MAC - Cortex parts are 32K-256KF, and up to 64KRam, and 5.5V IO's well... (but no 32 bit timers?) Choic...


deciding capacitor & resistor values

Started by Kshitiz Bartariya in comp.arch.embedded10 years ago 4 replies

I am new to schematic design and studying OLinuXino A10s schematics. A generic question : How do we decide the resistor & capacitor values...

I am new to schematic design and studying OLinuXino A10s schematics. A generic question : How do we decide the resistor & capacitor values required to interface multiple ICs on a pcb ? E.x. I am unable to understand why a 22ohm resistor is present in the clock signal (SCK,SCK# pins - W2, Y1 ) from A10s to SDRAM (h5tq2g83cfr-h9c) (CK, CK# pins - F7, G7). It is not given in either of their da...


Low Dhrystone score on Tricore TC1796

Started by Anonymous in comp.arch.embedded17 years ago 11 replies

Hello, I am doing the Dhrystone benchmark on a TC1796A microcontroller from Infineon with different compilers (TASKING, Hightec-RT GNU GCC)....

Hello, I am doing the Dhrystone benchmark on a TC1796A microcontroller from Infineon with different compilers (TASKING, Hightec-RT GNU GCC). Both compilers are set to produce highest speed optimized code, still I only get about 15 DMIPs with GNU GCC and about 20 DMIPs with TASKING. CPU is running at 150MHz, 75MHz system clock, programs run from external SRAM; no difference (as it should be...


HC908GR4/8 SPI interrupt problem

Started by Fred in comp.arch.embedded20 years ago 5 replies

The HC908GR4 acts as a SPI slave, the baud rate of the host clock is only around 5K bps. When the host sends a packet of 8-bytes to the HC908GR4,...

The HC908GR4 acts as a SPI slave, the baud rate of the host clock is only around 5K bps. When the host sends a packet of 8-bytes to the HC908GR4, it only generate the first Rx interrupt and the ISR only read the first byte. Then no more interrupt occurs, even on the subsequence packets. It seems just reading from the Status and Control Register then reading from the Data Register does not c...


Using the SSC on the ARM processor

Started by dave in comp.arch.embedded19 years ago 3 replies

Hello, Has anybody ever used this device? I am having enormous problems with the synch signal. The transmitter seems to start whenever...

Hello, Has anybody ever used this device? I am having enormous problems with the synch signal. The transmitter seems to start whenever it feels like it, not when the synch signal is asserted. The receiver never receives a synch signal, or if it does, it never starts receiving. The transmitter generates the synch signal, and the clock. The receiver should start on a synch. ...


ASYNC SRAM selection

Started by Neven Colak in comp.arch.embedded20 years ago 1 reply

Hi, Does anyone know if 4ns ASYNC SRAM is available? I am designing a system which connects to a 64-bit TS202 tigersharc DSP at a...

Hi, Does anyone know if 4ns ASYNC SRAM is available? I am designing a system which connects to a 64-bit TS202 tigersharc DSP at a system clock of 100MHz and in order to get a zero-wait state system I need 4ns ASYNC SRAM.. perferably in a 64-bit package (but highly unlikely)... I'd be happy to find a 16 bit device and just populate 4 of them. Any help is appreciated. Neven


Rockchip RK3399. Is it possible to run SPI at 16 MHz?

Started by Wojciech Zabolotny in comp.arch.embedded4 years ago 1 reply

Hi, I need to control a board (WiFi HaLow based on NRC7292 chipset) from an RK3399-based system (currently Rockpi N10) After tests it appeared...

Hi, I need to control a board (WiFi HaLow based on NRC7292 chipset) from an RK3399-based system (currently Rockpi N10) After tests it appeared that this board requires the SPI clock frequency to be 16 MHz. Other frequencies result in communication errors. Details of my tests are available here: https://github.com/newracom/nrc7292_sw_pkg/issues/5 Unfortunately, it seems that RK3399 is able to ...


Recommend hardware with USB, RS232, A2D, and more...

Started by Rob in comp.arch.embedded20 years ago 1 reply

Looking for a processor board with: - USB Host port (Full-speed, USB v1.1 minimum), - 2x Serial ports (RS232, RS485), - 12-bit A/D converter...

Looking for a processor board with: - USB Host port (Full-speed, USB v1.1 minimum), - 2x Serial ports (RS232, RS485), - 12-bit A/D converter (under 2k samples/s) - Several general purpose I/O or parallel port. - Real-time clock (battery backed) and timers. - Low power consumption; few Watts. - Support an embedded operating system, like Linux preferably (but not essential). - Flash and RAM...


ARM-s : RAVEN with rtck release (LPC21xx)

Started by laurent gauch in comp.arch.embedded20 years ago 3 replies

Hi all, Amontec just released a new configuration of the RAVEN on the Chameleon POD. This configuration enables the use of the rtck (return...

Hi all, Amontec just released a new configuration of the RAVEN on the Chameleon POD. This configuration enables the use of the rtck (return clock) for all ARM -s series. In fact, the ARM7TDMI-s ( and other ARM -s ), like Philips LPC21xx, use the rtck signal to control the baudrate of the JTAG. This means you can debug software running at very low frequency, but this means too that ...



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