MSP430 External Clock

Started by Mike Page in comp.arch.embedded16 years ago 9 replies

Hi All, On any other chip external clocking would be a very simple thing, but not on the MSP430F437 it seems. Has anyone managed to...

Hi All, On any other chip external clocking would be a very simple thing, but not on the MSP430F437 it seems. Has anyone managed to externally clock XT1 with 32kHz (or thereabouts ?) I am having trouble with the chip giving me LFOF and shutting off ACLK (which is the whole reason for clocking XT1 - I'm using the LCD). Works just fine with a watch crystal, but I want to dispense with i...


Recommended Brands for NVRAM

Started by Noway2 in comp.arch.embedded14 years ago 8 replies

I am looking for recommendations on brands of non volatile sram. I want a device on the order of 32k - 512k by 16 bits, long non powered data...

I am looking for recommendations on brands of non volatile sram. I want a device on the order of 32k - 512k by 16 bits, long non powered data retention, and a real time clock would be preferable but not necessary. Speed isn't very criticical as I am running a 30 MHz bus clock with controllable wait states, so most memory devices will probably be a lot faster than my bus. I have looked at...


Locked out of ATmega48

Started by Hoi Wong in comp.arch.embedded11 years ago 10 replies

I was trying to set my atmega48 to use internal 128kHz clock (CKSEL fuse) through AVR studio but I guess I accidentally locked myself out...

I was trying to set my atmega48 to use internal 128kHz clock (CKSEL fuse) through AVR studio but I guess I accidentally locked myself out from programming the chip. I tried all ISP clock speed but had no luck with that. Here's the screenshot: http://www.stanford.edu/~wonghoi/atmega48lockout.png Can anybody suggest what has happened and how can I gain access back to the chip? I couldn't p...


Weird clock signal on dataread (AT91SAM9260)

Started by Anonymous in comp.arch.embedded12 years ago 1 reply

I tried posting this once before but I think it was rejected because of inline images, i'll try posting it again with links to the images: I...

I tried posting this once before but I think it was rejected because of inline images, i'll try posting it again with links to the images: I have a 6 layered sam9260 board and I'm seeing something strange on the 18Mhz clock. This is a scan from the SAM9260-EK (reference) board, when there's any data written to the dataflash, a probe on the crystal shows this pattern. (notice the slight...


Sleep clock (power management)

Started by ksas...@gmail.com in comp.arch.embedded11 years ago 1 reply

Hello Group, While reading some requirement specification I came across a term called "sleep clock". I know it it related to a power saving...

Hello Group, While reading some requirement specification I came across a term called "sleep clock". I know it it related to a power saving mechanism. I but I am not sure how it works exactly. Is it some kind of gating mechanism where the processor controlling the system power distribution, gives out a signal to suggest to other peripherals on the PCB to go in power down mode? -Kaustub...


AT91RM9200-EK & BasicGraphicDisplay

Started by triode+ in comp.arch.embedded14 years ago 2 replies

Hi! I'm trying to have the BasicGraphicDisplay sample (provided on Atmel C with the eval board) working on my board. I believe some of the...

Hi! I'm trying to have the BasicGraphicDisplay sample (provided on Atmel C with the eval board) working on my board. I believe some of the example provided with the board only apply to the DK, not the EK. But since al the hardware is here (clock generator and display controller), this on should work. When I ran the program, I received this message : "ICS1523 Clock Generator Init failed"...


Crossing Clock Domains in CPLD

Started by Anonymous in comp.arch.embedded12 years ago 2 replies

Hi, Is there any smart way to pass data thru different clock domains in CPLD chips (without internal RAM for fifo) without using additional...

Hi, Is there any smart way to pass data thru different clock domains in CPLD chips (without internal RAM for fifo) without using additional chips like external async fifo ? I'm using Xilinx's XC95 chips, but I can pick something else. -- voices (at) zrgnyyvpenva (dot) pbz [ROT13]


SPI Configuration

Started by Anonymous in comp.arch.embedded14 years ago 8 replies

Hello, I am trying to interface an MPC5554 procesor with 68HC908 processor using SPI ( Serial Peripheral interface). MPC5554 is the...

Hello, I am trying to interface an MPC5554 procesor with 68HC908 processor using SPI ( Serial Peripheral interface). MPC5554 is the Master CPU. I have little experience in configuring the SPI in low level. I would like to know the following. 1. What are the factors that I should consider while selecting the Clock Polarity and Clock Phase? In my case both Master and Slave CPUs sup...


AT91SAM7 USART

Started by comp.zrch.embedded in comp.arch.embedded11 years ago

I have an issue with the baud rate clock on a AT91SAM7S processor. The processor will run from an external 18.432MHz crystal and run at this...

I have an issue with the baud rate clock on a AT91SAM7S processor. The processor will run from an external 18.432MHz crystal and run at this frequency or will divide this down to 1.152MHz when it is required to run in low power mode. We also need to use the USART and do not want to loose any characters that are currently being received when we we switch over clock frequency. We also which a...


12.288 MHZ synthesis

Started by in comp.arch.embedded15 years ago 2 replies

Hi Group I am designing a frequency synthesizer that produces a 12.288 MHz clock from a 8 kHz input clock. I was thinking about using a...

Hi Group I am designing a frequency synthesizer that produces a 12.288 MHz clock from a 8 kHz input clock. I was thinking about using a 74HC4046A VCO/PLL in combination with at 74HC4059 divider, but I'm not too happy about it. For one thing I only have a 3V power supply, and the 4046A requires 3.0V to function. Another thing is that at 3.0 V, the 12.288 MHz is rather close to the upper f...


Atmel C one cycle

Started by Anonymous in comp.arch.embedded14 years ago 5 replies

Hi, I'm a bit struck at present as I am trying to make my data transfer over a clock cycle. I'm new to C in terms of using it...

Hi, I'm a bit struck at present as I am trying to make my data transfer over a clock cycle. I'm new to C in terms of using it on microcontrollers. my task is like - __ __ __ __ __ __| |__| |__| |__| |__| |____ - clock ____ ____ ____ __| |___| |___| |_______- data I am using a AT89C51ED2, I don't understand how to use the timers, a...


WIZ C problem

Started by Anonymous in comp.arch.embedded15 years ago 1 reply

Hi all I have a problem using the I2C module found within the WIZ C. I need the clock (SCL) to be less than 100kHz. The manual says that there...

Hi all I have a problem using the I2C module found within the WIZ C. I need the clock (SCL) to be less than 100kHz. The manual says that there is a constant named IIStretch that enables the user to elongate the Data and clock pulses with the integer set by this constant. This is done because as a default the WIZ C transmits data at 400KHz. Howewver, this is not working since I verified wit...


Software Real-Time Clock on HC12

Started by Christian Winter in comp.arch.embedded14 years ago 5 replies

Hi! I am trying to implement a software real-time clock on the HC12 using the timer module. I am pretty much unable to do it at this point...

Hi! I am trying to implement a software real-time clock on the HC12 using the timer module. I am pretty much unable to do it at this point and was hoping that someone could point me in the right direction -- perhaps even coded examples that could serve as a way to better understand it. I need to keep track of a 24 hour day, no need for any actual dates. I can code using either assembler or...


Using Atmel AT45DB642D Data Flash

Started by Marius Hancu in comp.arch.embedded12 years ago

Hello: Perhaps Mr. Samuelsson of Atmel or others could comment on this: Our programmers are telling me re: a system which is supposed to...

Hello: Perhaps Mr. Samuelsson of Atmel or others could comment on this: Our programmers are telling me re: a system which is supposed to use AT45DB642D data flash (with an MSP430) Team: ---------- About the flash memory. I am in the process of writing the driver for it. I saw an interesting thing ... the clock supplied to the memory is not continuous. It's the SPI clock which is ...


Weird clock behaviour on dataread (AT91SAM9260)

Started by Anonymous in comp.arch.embedded12 years ago

I have a 6 layered sam9260 board and I'm seeing something strange on the 18Mhz clock. This is a scan from the SAM9260-EK (reference) board,...

I have a 6 layered sam9260 board and I'm seeing something strange on the 18Mhz clock. This is a scan from the SAM9260-EK (reference) board, when there's any data written to the dataflash, a probe on the crystal shows this pattern. (notice the slightly raised ground, which then stabilizes and continues. [URL=http://img121.imagevenue.com/img.php?image=44891_ek- normal_122_731lo.JPG][IMG]h...


SDR SDRAM compability

Started by kalyanamsaritha in comp.arch.embedded11 years ago 1 reply

Could someone explain how I would go about determining if a particular SDR SDRAM (not DDR) is compatible with a CPU, AT91SAM9260 for...

Could someone explain how I would go about determining if a particular SDR SDRAM (not DDR) is compatible with a CPU, AT91SAM9260 for example. The cpu's Master Clock (MCK) runs at 100MHz which is the speed at which the SDRAM controller clock (SDCK) also runs. Does this automatically mean I should be looking for only PC100 rated SDR SDRAM? Any pointers would help the rest of us noobs out ...


Atmel atiny11 internal clock range

Started by Hul Tytus in comp.arch.embedded12 years ago 7 replies

comp.arch.embedded Atmel atiny11 internal clock range Has anyone seen a min/max spec. for Atmel's atiny11? The documentation here is dated...

comp.arch.embedded Atmel atiny11 internal clock range Has anyone seen a min/max spec. for Atmel's atiny11? The documentation here is dated 07/06, presumably june, 2006 and states only 1 megcps; no range, no thermal coeficient. Hul


Software real time clock using timer unit

Started by alex99 in comp.arch.embedded10 years ago 18 replies

I am trying to implement a software real-time clock on ARM using the timer module. I am pretty much unable to do it at this point and was...

I am trying to implement a software real-time clock on ARM using the timer module. I am pretty much unable to do it at this point and was hoping that someone could point me in the right direction -- perhaps even coded examples that could serve as a way to better understand it. I C language but am a newbie in micro-controllers. Have to display time using one of the GPIO ports. Thanks in ad...


H8S timer configuration problem

Started by Geek in comp.arch.embedded15 years ago 11 replies

Hello. I am having a problem generating a period interrupt on an H8S2329. For example, I want an interrupt every 1ms. I have the following...

Hello. I am having a problem generating a period interrupt on an H8S2329. For example, I want an interrupt every 1ms. I have the following code. System clock is 22.1184MHz throughout. #define CLOCK 22118400 #define INTERRUPT_RATE 1000 void SetupTimer( void ) { // Turn on TPU module. MSTPCR &= ~portMSTP13; // Configure for period count on compare match with TGR1A ...


PIC12F629 improper operation, i.e., incorrect outputs

Started by Richard Matsui in comp.arch.embedded15 years ago 2 replies

Could my application have a problem of noise, i.e., transient sensitivity? Does having 100k or 200k to +5v on the inputs/outputs reduce noise...

Could my application have a problem of noise, i.e., transient sensitivity? Does having 100k or 200k to +5v on the inputs/outputs reduce noise sensitivity? Putting small capacitance to ground and/or high resistance on the inputs/outputs to +5v help, except for the programming clock and data and VPP. And reducing the clock frequency feeding the program counter. Richard Matsui