Forums Search for: Memory
detecting memory-mapped i/o peripheral in OS
inhi all, can any explain function of bootloader, and how linux or other OS detects the external pheripherals on an x86...
hi all, can any explain function of bootloader, and how linux or other OS detects the external pheripherals on an x86 processor(80486). 2. which will create GDT,LDT,IDT in system linux or BIOS or boot loader. 3. if added new peripheral which is memory mapped in to the system address space(memory-mapped i/o) : how can i see the pheripheral in linux or other os, fo...
CoolRunner 2 CPLD
inI want to know if the X2c family (coolrunner II) have a non-volatile program memory inside its package: I would like a non-volatile...
I want to know if the X2c family (coolrunner II) have a non-volatile program memory inside its package: I would like a non-volatile memory (eeprom...) that contains the "programs" also when it's extinguished (and with a number of macrocells comparable with a small/medium fpga). However I would know the name of a low-power, non-volatile program memory family (CPLD). Another question: can I u...
x86 code compression
inHello In my project i just got 128kb memory space for my x86-ROM-code. So i'd like to try to get more code executed in this limited memory...
Hello In my project i just got 128kb memory space for my x86-ROM-code. So i'd like to try to get more code executed in this limited memory space. I wonder if anyone ever used x86 code compression successfully to save memory footage !? URLs & book references appreciated. thanks in advance josef
AVR + USB Memory stick
inI want to build an small data logger based around ATMEL's 8535 (or one of the AVR Mega). I need to log around 300MBytes of data. USB memory...
I want to build an small data logger based around ATMEL's 8535 (or one of the AVR Mega). I need to log around 300MBytes of data. USB memory sticks are cost effective storage mediums. Is there a simple way to interface a USB memory stick with an ATMEL microcotroller? Ray
Debugger question
inHi, when using the powerpc-eabi-gdb debugger. To set breakpoints, gdb uses memory read and write commands to nondestructively replace a...
Hi, when using the powerpc-eabi-gdb debugger. To set breakpoints, gdb uses memory read and write commands to nondestructively replace a source instruction with a trap instruction. If you replace a source instruction, isn't the memory at that moment changing ? So are the memory locations in that case still correct ? Tom
TMS470 - Use of external bus to access memory and peripherals
I have tried to figure out from TMS470R1 documentation but it is not clear to me if what I want to do is possible. I want to access two classes...
I have tried to figure out from TMS470R1 documentation but it is not clear to me if what I want to do is possible. I want to access two classes of devices through the external bus: an asynchronous memory and slow peripheral devices (from a legacy design). The async memory will be 16 bits wide and should be accessed as fast as possible (timebase: SYSCLOCK @ 60MHz) whereas the peripheral bus wi...
VMA vs LMA?
inHi! What is the difference between VMA (Virtual Memory Address) and LMA (Load Memory Address)? The Gnu ld documentation has the following...
Hi! What is the difference between VMA (Virtual Memory Address) and LMA (Load Memory Address)? The Gnu ld documentation has the following explanation: "Every loadable or allocatable output section has two addresses. The first is the VMA, or virtual memory address. This is the address the section will have when the output file is run. The second is the LMA, or load memory address. This i...
Memory Test algorithm
inHi all, I'm trying to use the Michael Barr's memory testing algorithm (http:// www.netrino.com/Embedded-Systems/How-To/Memory-Test-Suite-C) but...
Hi all, I'm trying to use the Michael Barr's memory testing algorithm (http:// www.netrino.com/Embedded-Systems/How-To/Memory-Test-Suite-C) but I'm not completely satisfied of it. Referring to the Address Bus test, I think that not all the address bus fault can be detected by this algorithm... For example, If you have more than one address line stuck high, you'll not catch it. If you have t...
How Physical Memory Mapping / Allocation works
inHi guys, I am new on software programming and I am trying to understand some basic/ important things.I am interested in Bare-metal software...
Hi guys, I am new on software programming and I am trying to understand some basic/ important things.I am interested in Bare-metal software programming, so please give me answers related on this. My question is: who is responsible and manage the physical memory mapping / allocation? Meaning, If I have 1GB physical memory on my system, the 1) CPU or 2) the Bootloader (like GRUB, U-b
MSP430 info memory vs Rowley
inI'm trying to locate a structure in MSP430 info memory using Rowley CrossWorks (a preinitialized structure, so it appears in the .txt file). Is...
I'm trying to locate a structure in MSP430 info memory using Rowley CrossWorks (a preinitialized structure, so it appears in the .txt file). Is there a pragma or other directive similar to IAR's that will directly place my structure in info memory without having to play with custom segment names and special linker control info? ISTR having done this in the past but cannot remember how to do i...
USB iterface to read memory sticks
inHi. I am new to this group, I have look through the archive (as much of the old archive as possible) but haven't found any solution. I...
Hi. I am new to this group, I have look through the archive (as much of the old archive as possible) but haven't found any solution. I wish to interface a AVR Mega128 to read USB Memory Sticks or worst case PCMCIA Memory Flash Cards. Thus the USB I am loking for is a master rather than the off-the- shelf slave designs. Can anyone kindly point me to a URL with such a interface design...
paradigm locate 5.0 for 80188: insufficient memory?
inHello, I have paradigm locate 5.0 that I use to generate rom image for 80C188XL cpu. it works fine with the demo comming with it (the...
Hello, I have paradigm locate 5.0 that I use to generate rom image for 80C188XL cpu. it works fine with the demo comming with it (the 'sieve' demo). However, it does not work with my own files, complaining "error 1004: insufficient memory available for paradigm locate". The compiled executable is not very big, it is about 38 kBytes. I run locate on the computer with 128MBytes memory and it...
8051: writing to memory in the program
inI'm learning the 8051 type microcontroller now and using the Atmel 89s52 microcontroller. There are 2kb of RAM and 8kb of flash memory. I'd...
I'm learning the 8051 type microcontroller now and using the Atmel 89s52 microcontroller. There are 2kb of RAM and 8kb of flash memory. I'd like my program to be able to write some data to memory while running, so these data can be remembered when power down and can be retrieved at power up. Is there a way to do it? How do I do such a write with embedded c? Thanks
STR912 bitfield access to memory mapped peripherals
inGood day, I wonder if somebody has managed to create a structured way of accessing the memory mapped IO attached to the STR912 [ARM9] via...
Good day, I wonder if somebody has managed to create a structured way of accessing the memory mapped IO attached to the STR912 [ARM9] via bitfields. I can manipulate the members of a union that is declared in main(), bus as soon as I make a pointer type of my union and point it to the memory bus, I get unexpected results. The following two posts, from 2000 and 2005, make it seem asif it is...
Name this CPU (2)
in* internal SRAM and FLASH ROM (protected from reading) * instruction set similar to x86, including: instruction mnemonics, ...
* internal SRAM and FLASH ROM (protected from reading) * instruction set similar to x86, including: instruction mnemonics, addressing modes, 8-16-32bit regs, read/write 8-16-32bit from/to internal/external memory, FPU * 32megs of addressable external memory * timers/counters, external IRQs, 32bits of memory-mapped I/O * pin-count around 100 (32 for data, 3...
Name this CPU
in(in order of importance) * internal SRAM and FLASH ROM (protected from reading) * instruction set similar to x86, including: ...
(in order of importance) * internal SRAM and FLASH ROM (protected from reading) * instruction set similar to x86, including: instruction mnemonics, addressing modes, 8-16-32bit regs, read/write 8-16-32bit from/to internal/external memory, FPU * 32megs of addressable external memory * timers/counters, external IRQs, 32bits of memory-mapped I/O * pin-coun...
"free" deallocation function with VisualDSP++ 4.5 for BF
inHi, Working with VisualDSP++ 4.5 for BF, the documentation...
Hi, Working with VisualDSP++ 4.5 for BF, the documentation says: free -------------------------------------------------------------------------------- deallocate memory Synopsis #include void free(void *ptr); Description The free function deallocates a pointer previously allocated to a range of memory (by calloc or malloc) to the free memory heap. If the pointer
Microprocessor address space and variables?
inHallo, I must create a memory for a display lcd. This is part of a microcontroller based on a microprocessor. I thought to do it using a...
Hallo, I must create a memory for a display lcd. This is part of a microcontroller based on a microprocessor. I thought to do it using a variable, a matrix: display[X][Y] (the software video memory). This variable should exaclty stay into micrporcessor address space where I have mapped a ram (the hardware video memory) from 0x77200000 to 0x7720FFFF. In this way, working with my var...
Read EEPROM Memory on a mc9s12dg256 from Motorola
inHi ! I have to write an EEPROM driver for an mc9s12dg256 from Motorola. Everything is fine, but i cant find a command ro read from the...
Hi ! I have to write an EEPROM driver for an mc9s12dg256 from Motorola. Everything is fine, but i cant find a command ro read from the eeprom memory. There are commands for Writing and erasing, but no Command for reading the memory. The Documentation from Motorola is real bad. Please help ! THX
Compact Flash Interfacing
inI am working on a compact flash design that will support Memory mode and I/O Mode but not True IDE Mode. The interface will be 16 bits...
I am working on a compact flash design that will support Memory mode and I/O Mode but not True IDE Mode. The interface will be 16 bits only. I can't see a compelling reason not to tie A0 & A5-A8 low. A9 is used in Attribute Memory. I have connections to REG, A10, A9, A4-A1. Starting with the Memory Mode interface, I added IORD & IOWR to support I/O Mode. I ignore IOCS since all interfa...